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Date:   Mon, 04 Oct 2021 10:05:44 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Alyssa Rosenzweig <alyssa@...enzweig.io>,
        Stan Skowronek <stan@...ellium.com>,
        Mark Kettenis <kettenis@...nbsd.org>,
        Sven Peter <sven@...npeter.dev>,
        Hector Martin <marcan@...can.st>,
        Robin Murphy <Robin.Murphy@....com>,
        Joey Gouly <joey.gouly@....com>,
        Joerg Roedel <joro@...tes.org>, kernel-team@...roid.com,
        Linus Walleij <linus.walleij@...aro.org>,
        Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH v5 00/14] PCI: Add support for Apple M1

Hi Lorenzo,

[+LinusW, Arnd]

On Mon, 04 Oct 2021 09:38:45 +0100,
Lorenzo Pieralisi <lorenzo.pieralisi@....com> wrote:
> 
> On Wed, Sep 29, 2021 at 05:38:33PM +0100, Marc Zyngier wrote:
> > This is v5 of the series adding PCIe support for the M1 SoC. Not a lot
> > has changed this time around, and most of what I was saying in [1] is
> > still valid.
> > 
> > Very little has changed code wise (a couple of bug fixes). The series
> > however now carries a bunch of DT updates so that people can actually
> > make use of PCIe on an M1 box (OK, not quite, you will still need [2],
> > or whatever version replaces it). The corresponding bindings are
> > either already merged, or queued for 5.16 (this is the case for the
> > PCI binding).
> > 
> > It all should be in a state that makes it mergeable (yeah, I said that
> > last time... I mean it this time! ;-).
> > 
> > As always, comments welcome.
> > 
> > 	M.
> > 
> > [1] https://lore.kernel.org/r/20210922205458.358517-1-maz@kernel.org
> > [2] https://lore.kernel.org/r/20210921222956.40719-2-joey.gouly@arm.com
> > 
> > Alyssa Rosenzweig (2):
> >   PCI: apple: Add initial hardware bring-up
> >   PCI: apple: Set up reference clocks when probing
> > 
> > Marc Zyngier (10):
> >   irqdomain: Make of_phandle_args_to_fwspec generally available
> >   of/irq: Allow matching of an interrupt-map local to an interrupt
> >     controller
> >   PCI: of: Allow matching of an interrupt-map local to a PCI device
> >   PCI: apple: Add INTx and per-port interrupt support
> >   PCI: apple: Implement MSI support
> >   iommu/dart: Exclude MSI doorbell from PCIe device IOVA range
> >   PCI: apple: Configure RID to SID mapper on device addition
> >   arm64: dts: apple: t8103: Add PCIe DARTs
> >   arm64: dts: apple: t8103: Add root port interrupt routing
> >   arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
> > 
> > Mark Kettenis (2):
> >   arm64: apple: Add pinctrl nodes
> >   arm64: apple: Add PCIe node
> > 
> >  MAINTAINERS                              |   7 +
> >  arch/arm64/boot/dts/apple/t8103-j274.dts |  23 +
> >  arch/arm64/boot/dts/apple/t8103.dtsi     | 203 ++++++
> >  drivers/iommu/apple-dart.c               |  27 +
> >  drivers/of/irq.c                         |  17 +-
> >  drivers/pci/controller/Kconfig           |  17 +
> >  drivers/pci/controller/Makefile          |   1 +
> >  drivers/pci/controller/pcie-apple.c      | 822 +++++++++++++++++++++++
> >  drivers/pci/of.c                         |  10 +-
> >  include/linux/irqdomain.h                |   4 +
> >  kernel/irq/irqdomain.c                   |   6 +-
> >  11 files changed, 1127 insertions(+), 10 deletions(-)
> >  create mode 100644 drivers/pci/controller/pcie-apple.c
> 
> I have applied (with very minor log changes) patches [1-9] to
> pci/apple for v5.16, I expect the dts changes to go via the
> arm-soc tree separately, please let me know if that works for you.

Yes, that's absolutely fine. I hope we can resolve the issue on the
pinctrl binding pretty quickly, and get the arm-soc folks to pull the
DT changes in for 5.16 too.

This would make the Mini a usable machine with a mainline kernel.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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