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Message-ID: <20211004094555.26azbbzhzdzavjpf@pengutronix.de>
Date: Mon, 4 Oct 2021 11:45:55 +0200
From: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To: Eric Tremblay <etremblay@...tech-controls.com>
Cc: gregkh@...uxfoundation.org, jslaby@...e.com,
andriy.shevchenko@...ux.intel.com, matwey.kornilov@...il.com,
giulio.benetti@...ronovasrl.com, lukas@...ner.de,
linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
heiko@...ech.de, heiko.stuebner@...obroma-systems.com
Subject: Re: [PATCH v2 1/3] serial: 8250: Handle UART without interrupt on
TEMT using em485
Hello,
[dropped christoph.muellner@...obroma-systems.com from Cc: as the
address doesn't seem to work any more]
On Thu, Feb 04, 2021 at 11:11:56AM -0500, Eric Tremblay wrote:
> The patch introduce the UART_CAP_NOTEMT capability. The capability
> indicate that the UART doesn't have an interrupt available on TEMT.
>
> In the case where the device does not support it, we calculate the
> maximum time it could take for the transmitter to empty the
> shift register. When we get in the situation where we get the
> THRE interrupt, we check if the TEMT bit is set. If it's not, we start
> the a timer and recall __stop_tx() after the delay.
>
> The transmit sequence is a bit modified when the capability is set. The
> new timer is used between the last interrupt(THRE) and a potential
> stop_tx timer.
I wonder if the required change can be simplified by just increasing the
stop_tx_timer timeout as there is nothing that has to happen when the
shifter is empty apart from starting the stop_tx timer.
This would require a good documentation because the semantic of the stop
timer would change.
@Eric: Do you plan to address the feedback comments here? I'd volunteer
as a tester if yes. Otherwise there might be some incentive to work on
this series myself.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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