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Message-ID: <878rz9rtky.wl-maz@kernel.org>
Date:   Mon, 04 Oct 2021 11:07:57 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Sam Shih <sam.shih@...iatek.com>
Cc:     <matthias.bgg@...il.com>, <Ryder.Lee@...iatek.com>,
        <devicetree@...r.kernel.org>, <enric.balletbo@...labora.com>,
        <fparent@...libre.com>, <gregkh@...uxfoundation.org>,
        <herbert@...dor.apana.org.au>, <hsinyi@...omium.org>,
        <john@...ozen.org>, <linus.walleij@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-clk@...r.kernel.org>, <linux-crypto@...r.kernel.org>,
        <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-serial@...r.kernel.org>, <linux-watchdog@...r.kernel.org>,
        <linux@...ck-us.net>, <mpm@...enic.com>, <mturquette@...libre.com>,
        <robh+dt@...nel.org>, <sboyd@...nel.org>, <sean.wang@...nel.org>,
        <seiya.wang@...iatek.com>, <wim@...ux-watchdog.org>
Subject: Re: [v4,8/9] arm64: dts: mediatek: add mt7986a support

On Mon, 04 Oct 2021 10:12:08 +0100,
Sam Shih <sam.shih@...iatek.com> wrote:
> 
> +		gic: interrupt-controller@...0000 {
> +			compatible = "arm,gic-v3";
> +			#interrupt-cells = <3>;
> +			interrupt-parent = <&gic>;
> +			interrupt-controller;
> +			reg = <0 0x0c000000 0 0x40000>,  /* GICD */
> +			      <0 0x0c080000 0 0x80000>,  /* GICR */
> +			      <0 0x0c400000 0 0x2000>,   /* GICC */
> +			      <0 0x0c410000 0 0x1000>,   /* GICH */
> +			      <0 0x0c420000 0 0x2000>;   /* GICV */
> +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		};

Also, the GICD region is totally wrong. It is 64kB at all times. I
don't know where you get this 256kB figure from.

	M.

-- 
Without deviation from the norm, progress is not possible.

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