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Message-Id: <20211005155923.173399-3-marcan@marcan.st>
Date: Wed, 6 Oct 2021 00:59:18 +0900
From: Hector Martin <marcan@...can.st>
To: linux-arm-kernel@...ts.infradead.org
Cc: Hector Martin <marcan@...can.st>, Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Arnd Bergmann <arnd@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Alyssa Rosenzweig <alyssa@...enzweig.io>,
Krzysztof Kozlowski <krzk@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Mark Kettenis <mark.kettenis@...all.nl>,
Philipp Zabel <p.zabel@...gutronix.de>,
"Rafael J. Wysocki" <rafael@...nel.org>,
devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
linux-serial@...r.kernel.org
Subject: [PATCH 2/7] dt-bindings: power: Add apple,pmgr-pwrstate binding
This syscon child node represents a single SoC device controlled by the
PMGR block. This layout allows us to declare all device power state
controls (power/clock gating and reset) in the device tree, including
dependencies, instead of hardcoding it into the driver. The register
layout is uniform.
Each pmgr-pwrstate node provides genpd and reset features, to be
consumed by downstream device nodes.
Future SoCs are expected to use backwards compatible registers, and the
"apple,pmgr-pwrstate" represents any such interfaces (possibly with
additional features gated by the more specific compatible), allowing
them to be bound without driver updates. If a backwards incompatible
change is introduced in future SoCs, it will require a new compatible,
such as "apple,pmgr-pwrstate-v2".
Signed-off-by: Hector Martin <marcan@...can.st>
---
.../bindings/power/apple,pmgr-pwrstate.yaml | 117 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 118 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
new file mode 100644
index 000000000000..a14bf5f30ff0
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml
@@ -0,0 +1,117 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple SoC PMGR Power States
+
+maintainers:
+ - Hector Martin <marcan@...can.st>
+
+allOf:
+ - $ref: "power-domain.yaml#"
+
+description: |
+ Apple SoCs include a PMGR block responsible for power management,
+ which can control various clocks, resets, power states, and
+ performance features. This binding describes the device power
+ state registers, which control power states and resets.
+
+ Each instance of a power controller within the PMGR syscon node
+ represents a generic power domain provider, as documented in
+ Documentation/devicetree/bindings/power/power-domain.yaml.
+ The provider controls a single SoC block. The power hierarchy is
+ represented via power-domains relationships between these nodes.
+
+ See Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
+ for the top-level PMGR node documentation.
+
+ IP cores belonging to a power domain should contain a
+ "power-domains" property that is a phandle for the
+ power domain node representing the domain.
+
+properties:
+ $nodename:
+ pattern: "^power-controller@[0-9a-f]+$"
+
+ compatible:
+ items:
+ - enum:
+ - apple,t8103-pmgr-pwrstate
+ - const: apple,pmgr-pwrstate
+
+ reg:
+ maxItems: 1
+
+ "#power-domain-cells":
+ const: 0
+
+ "#reset-cells":
+ const: 0
+
+ power-domains:
+ description:
+ Reference to parent power domains. A domain may have multiple parents,
+ and all will be powered up when it is powered.
+
+ apple,domain-name:
+ description: |
+ Specifies the name of the SoC device being controlled. This is used to
+ name the power/reset domains.
+ $ref: /schemas/types.yaml#/definitions/string
+
+ apple,always-on:
+ description: |
+ Forces this power domain to always be powered up.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - "#power-domain-cells"
+ - "#reset-cells"
+ - "apple,domain-name"
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ power-management@...700000 {
+ compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2 0x3b700000 0x0 0x14000>;
+
+ ps_sio: power-controller@1c0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1c0>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "sio";
+ apple,always-on;
+ };
+
+ ps_uart_p: power-controller@220 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x220>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "uart_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_uart0: power-controller@270 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x270>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "uart0";
+ power-domains = <&ps_uart_p>;
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index d25598842d15..5fe53d9a2956 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1722,6 +1722,7 @@ F: Documentation/devicetree/bindings/arm/apple.yaml
F: Documentation/devicetree/bindings/arm/apple/*
F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
+F: Documentation/devicetree/bindings/power/apple*
F: arch/arm64/boot/dts/apple/
F: drivers/irqchip/irq-apple-aic.c
F: include/dt-bindings/interrupt-controller/apple-aic.h
--
2.33.0
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