lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <163345423700.2001694.5653085141940230637.b4-ty@arm.com>
Date:   Tue,  5 Oct 2021 18:17:25 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     linux-arm-kernel@...ts.infradead.org,
        Pingfan Liu <kernelfans@...il.com>
Cc:     Will Deacon <will@...nel.org>,
        "Paul E. McKenney" <paulmck@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
        Yuichi Ito <ito-yuichi@...itsu.com>,
        Julien Thierry <julien.thierry@....com>,
        Marc Zyngier <maz@...nel.org>, Joey Gouly <joey.gouly@....com>,
        Sami Tolvanen <samitolvanen@...gle.com>
Subject: Re: [PATCHv4 0/3] arm64/irqentry: remove duplicate housekeeping of rcu

On Fri, 1 Oct 2021 22:44:03 +0800, Pingfan Liu wrote:
> When an IRQ is taken, some accounting needs to be performed to enter and
> exit IRQ context around the IRQ handler. Historically arch code would
> leave this to the irqchip or core IRQ code, but these days we want this
> to happen in exception entry code, and architectures such as arm64 do
> this.
> 
> Currently handle_domain_irq() performs this entry/exit accounting, and
> if used on an architecture where the entry code also does this, the
> entry/exit accounting will be performed twice per IRQ. This is
> problematic as core RCU code such as rcu_is_cpu_rrupt_from_idle()
> depends on this happening once per IRQ, and will not detect quescent
> periods correctly, leading to stall warnings.
> 
> [...]

Applied to arm64 (for-next/fixes), thanks!

[1/3] kernel/irq: make irq_{enter,exit}() in handle_domain_irq() arch optional
      https://git.kernel.org/arm64/c/db795cf55b21
[2/3] arm64: entry: refactor EL1 interrupt entry logic
      https://git.kernel.org/arm64/c/ad0d5cfb9535
[3/3] arm64: entry: avoid double-accounting IRQ RCU entry
      https://git.kernel.org/arm64/c/12074b059fdc

-- 
Catalin

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ