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Date:   Tue,  5 Oct 2021 12:58:57 +0200
From:   Marco Elver <>
To:, "Paul E . McKenney" <>
Cc:     Alexander Potapenko <>,
        Boqun Feng <>,
        Borislav Petkov <>,
        Dmitry Vyukov <>,
        Ingo Molnar <>,
        Josh Poimboeuf <>,
        Mark Rutland <>,
        Peter Zijlstra <>,
        Thomas Gleixner <>,
        Waiman Long <>,
        Will Deacon <>,,,,,,,
Subject: [PATCH -rcu/kcsan 15/23] locking/barriers, kcsan: Support generic instrumentation

Thus far only smp_*() barriers had been defined by asm-generic/barrier.h
based on __smp_*() barriers, because the !SMP case is usually generic.

With the introduction of instrumentation, it also makes sense to have
asm-generic/barrier.h assist in the definition of instrumented versions
of mb(), rmb(), wmb(), dma_rmb(), and dma_wmb().

Because there is no requirement to distinguish the !SMP case, the
definition can be simpler: we can avoid also providing fallbacks for the
__ prefixed cases, and only check if `defined(__<barrier>)`, to finally
define the KCSAN-instrumented versions.

This also allows for the compiler to complain if an architecture
accidentally defines both the normal and __ prefixed variant.

Signed-off-by: Marco Elver <>
 include/asm-generic/barrier.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index 27a9c9edfef6..02c4339c8eeb 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -21,6 +21,31 @@
 #define nop()	asm volatile ("nop")
+ * Architectures that want generic instrumentation can define __ prefixed
+ * variants of all barriers.
+ */
+#ifdef __mb
+#define mb()	do { kcsan_mb(); __mb(); } while (0)
+#ifdef __rmb
+#define rmb()	do { kcsan_rmb(); __rmb(); } while (0)
+#ifdef __wmb
+#define wmb()	do { kcsan_wmb(); __wmb(); } while (0)
+#ifdef __dma_rmb
+#define dma_rmb()	do { kcsan_rmb(); __dma_rmb(); } while (0)
+#ifdef __dma_wmb
+#define dma_wmb()	do { kcsan_wmb(); __dma_wmb(); } while (0)
  * Force strict CPU ordering. And yes, this is required on UP too when we're
  * talking to devices.

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