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Message-ID: <YVw53mP3VkWyCzxn@hirez.programming.kicks-ass.net>
Date: Tue, 5 Oct 2021 13:41:18 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Marco Elver <elver@...gle.com>
Cc: "Paul E . McKenney" <paulmck@...nel.org>,
Alexander Potapenko <glider@...gle.com>,
Boqun Feng <boqun.feng@...il.com>,
Borislav Petkov <bp@...en8.de>,
Dmitry Vyukov <dvyukov@...gle.com>,
Ingo Molnar <mingo@...nel.org>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Waiman Long <longman@...hat.com>,
Will Deacon <will@...nel.org>, kasan-dev@...glegroups.com,
linux-arch@...r.kernel.org, linux-doc@...r.kernel.org,
linux-kbuild@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mm@...ck.org, x86@...nel.org
Subject: Re: [PATCH -rcu/kcsan 05/23] kcsan: Add core memory barrier
instrumentation functions
On Tue, Oct 05, 2021 at 12:58:47PM +0200, Marco Elver wrote:
> +static __always_inline void kcsan_atomic_release(int memorder)
> +{
> + if (memorder == __ATOMIC_RELEASE ||
> + memorder == __ATOMIC_SEQ_CST ||
> + memorder == __ATOMIC_ACQ_REL)
> + __kcsan_release();
> +}
> +
> #define DEFINE_TSAN_ATOMIC_LOAD_STORE(bits) \
> u##bits __tsan_atomic##bits##_load(const u##bits *ptr, int memorder); \
> u##bits __tsan_atomic##bits##_load(const u##bits *ptr, int memorder) \
> { \
> + kcsan_atomic_release(memorder); \
> if (!IS_ENABLED(CONFIG_KCSAN_IGNORE_ATOMICS)) { \
> check_access(ptr, bits / BITS_PER_BYTE, KCSAN_ACCESS_ATOMIC, _RET_IP_); \
> } \
> @@ -1156,6 +1187,7 @@ EXPORT_SYMBOL(__tsan_init);
> void __tsan_atomic##bits##_store(u##bits *ptr, u##bits v, int memorder); \
> void __tsan_atomic##bits##_store(u##bits *ptr, u##bits v, int memorder) \
> { \
> + kcsan_atomic_release(memorder); \
> if (!IS_ENABLED(CONFIG_KCSAN_IGNORE_ATOMICS)) { \
> check_access(ptr, bits / BITS_PER_BYTE, \
> KCSAN_ACCESS_WRITE | KCSAN_ACCESS_ATOMIC, _RET_IP_); \
> @@ -1168,6 +1200,7 @@ EXPORT_SYMBOL(__tsan_init);
> u##bits __tsan_atomic##bits##_##op(u##bits *ptr, u##bits v, int memorder); \
> u##bits __tsan_atomic##bits##_##op(u##bits *ptr, u##bits v, int memorder) \
> { \
> + kcsan_atomic_release(memorder); \
> if (!IS_ENABLED(CONFIG_KCSAN_IGNORE_ATOMICS)) { \
> check_access(ptr, bits / BITS_PER_BYTE, \
> KCSAN_ACCESS_COMPOUND | KCSAN_ACCESS_WRITE | \
> @@ -1200,6 +1233,7 @@ EXPORT_SYMBOL(__tsan_init);
> int __tsan_atomic##bits##_compare_exchange_##strength(u##bits *ptr, u##bits *exp, \
> u##bits val, int mo, int fail_mo) \
> { \
> + kcsan_atomic_release(mo); \
> if (!IS_ENABLED(CONFIG_KCSAN_IGNORE_ATOMICS)) { \
> check_access(ptr, bits / BITS_PER_BYTE, \
> KCSAN_ACCESS_COMPOUND | KCSAN_ACCESS_WRITE | \
> @@ -1215,6 +1249,7 @@ EXPORT_SYMBOL(__tsan_init);
> u##bits __tsan_atomic##bits##_compare_exchange_val(u##bits *ptr, u##bits exp, u##bits val, \
> int mo, int fail_mo) \
> { \
> + kcsan_atomic_release(mo); \
> if (!IS_ENABLED(CONFIG_KCSAN_IGNORE_ATOMICS)) { \
> check_access(ptr, bits / BITS_PER_BYTE, \
> KCSAN_ACCESS_COMPOUND | KCSAN_ACCESS_WRITE | \
> @@ -1246,6 +1281,7 @@ DEFINE_TSAN_ATOMIC_OPS(64);
> void __tsan_atomic_thread_fence(int memorder);
> void __tsan_atomic_thread_fence(int memorder)
> {
> + kcsan_atomic_release(memorder);
> __atomic_thread_fence(memorder);
> }
> EXPORT_SYMBOL(__tsan_atomic_thread_fence);
I find that very hard to read.. kcsan_atomic_release() it not in fact a
release. It might be a release if @memorder implies one.
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