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Message-ID: <YV40Zh9snnXqDIhn@pendragon.ideasonboard.com>
Date: Thu, 7 Oct 2021 02:42:30 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Pratyush Yadav <p.yadav@...com>
Cc: Mauro Carvalho Chehab <mchehab@...nel.org>,
Nikhil Devshatwar <nikhil.nd@...com>,
Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Vignesh Raghavendra <vigneshr@...com>,
Benoit Parrot <bparrot@...com>,
Maxime Ripard <mripard@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Niklas Söderlund
<niklas.soderlund+renesas@...natech.se>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-media@...r.kernel.org
Subject: Re: [PATCH v4 04/11] media: cadence: csi2rx: Set the STOP bit when
stopping a stream
Hi Pratyush,
Thank you for the patch.
On Wed, Sep 15, 2021 at 05:32:33PM +0530, Pratyush Yadav wrote:
> The stream stop procedure says that the STOP bit should be set when the
> stream is to be stopped, and then the ready bit in stream status
> register polled to make sure the STOP operation is finished.
>
> Signed-off-by: Pratyush Yadav <p.yadav@...com>
> ---
>
> (no changes since v1)
>
> drivers/media/platform/cadence/cdns-csi2rx.c | 18 +++++++++++++++++-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
> index e05d76394cd6..3730e8beee48 100644
> --- a/drivers/media/platform/cadence/cdns-csi2rx.c
> +++ b/drivers/media/platform/cadence/cdns-csi2rx.c
> @@ -8,6 +8,7 @@
> #include <linux/clk.h>
> #include <linux/delay.h>
> #include <linux/io.h>
> +#include <linux/iopoll.h>
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_graph.h>
> @@ -40,8 +41,12 @@
>
> #define CSI2RX_STREAM_CTRL_REG(n) (CSI2RX_STREAM_BASE(n) + 0x000)
> #define CSI2RX_STREAM_CTRL_SOFT_RST BIT(4)
> +#define CSI2RX_STREAM_CTRL_STOP BIT(1)
> #define CSI2RX_STREAM_CTRL_START BIT(0)
>
> +#define CSI2RX_STREAM_STATUS_REG(n) (CSI2RX_STREAM_BASE(n) + 0x004)
> +#define CSI2RX_STREAM_STATUS_RDY BIT(31)
> +
> #define CSI2RX_STREAM_DATA_CFG_REG(n) (CSI2RX_STREAM_BASE(n) + 0x008)
> #define CSI2RX_STREAM_DATA_CFG_EN_VC_SELECT BIT(31)
> #define CSI2RX_STREAM_DATA_CFG_VC_SELECT(n) BIT((n) + 16)
> @@ -321,12 +326,23 @@ static int csi2rx_start(struct csi2rx_priv *csi2rx)
> static void csi2rx_stop(struct csi2rx_priv *csi2rx)
> {
> unsigned int i;
> + u32 val;
> + int ret;
>
> clk_prepare_enable(csi2rx->p_clk);
> clk_disable_unprepare(csi2rx->sys_clk);
>
> for (i = 0; i < csi2rx->max_streams; i++) {
> - writel(0, csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
> + writel(CSI2RX_STREAM_CTRL_STOP,
> + csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
> +
> + ret = readl_relaxed_poll_timeout(csi2rx->base +
> + CSI2RX_STREAM_STATUS_REG(i),
> + val,
> + (val & CSI2RX_STREAM_STATUS_RDY),
> + 10, 10000);
> + if (ret)
> + dev_warn(csi2rx->dev, "Failed to stop stream%d\n", i);
%u for unsigned int.
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
>
> clk_disable_unprepare(csi2rx->pixel_clk[i]);
> }
--
Regards,
Laurent Pinchart
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