linux-kernel - Re: [PATCH 7/7] arm64: dts: imx8mn: Enable GPU

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Message-ID: <c4c5e2dd51e6a47c0973f46ff64ac200405ac84e.camel@pengutronix.de>
Date:   Wed, 06 Oct 2021 09:53:51 +0200
From:   Lucas Stach <l.stach@...gutronix.de>
To:     Adam Ford <aford173@...il.com>,
        linux-arm-kernel@...ts.infradead.org
Cc:     aford@...conembedded.com, Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 7/7] arm64: dts: imx8mn: Enable GPU

Am Dienstag, dem 05.10.2021 um 19:05 -0500 schrieb Adam Ford:
> The i.MX8M-Nano features a GC7000. The Etnaviv driver detects it as:
> 
>     etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203
> 
> Signed-off-by: Adam Ford <aford173@...il.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mn.dtsi | 25 +++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 57f67257d2fd..46144a7482d3 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -1089,6 +1089,31 @@ gpmi: nand-controller@...02000 {
>  			status = "disabled";
>  		};
>  
> +		gpu: gpu@...00000 {
> +			compatible = "vivante,gc";
> +			reg = <0x38000000 0x8000>;
> +			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk IMX8MN_CLK_GPU_AHB>,
> +				<&clk IMX8MN_CLK_GPU_BUS_ROOT>,
> +				<&clk IMX8MN_CLK_GPU_CORE_ROOT>,
> +				<&clk IMX8MN_CLK_GPU_SHADER_DIV>;

Last one should be just IMX8MN_CLK_GPU_SHADER.

> +			clock-names = "reg", "bus", "core", "shader";
> +			assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE_SRC>,
> +					  <&clk IMX8MN_CLK_GPU_SHADER_SRC>,
> +					  <&clk IMX8MN_CLK_GPU_AXI>,
> +					  <&clk IMX8MN_CLK_GPU_AHB>,
> +					  <&clk IMX8MN_GPU_PLL>,
> +					  <&clk IMX8MN_CLK_GPU_CORE_DIV>,
> +					  <&clk IMX8MN_CLK_GPU_SHADER_DIV>;

_SRC and _DIV clocks are just legacy aliases for the now composite
clocks and should not be used in new DTs. Please just use the composite
clock handles directly.

Regards,
Lucas

> +			assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
> +						  <&clk IMX8MN_GPU_PLL_OUT>,
> +						  <&clk IMX8MN_SYS_PLL1_800M>,
> +						  <&clk IMX8MN_SYS_PLL1_800M>;
> +			assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>,
> +				<400000000>, <400000000>;
> +			power-domains = <&pgc_gpumix>;
> +		};
> +
>  		gic: interrupt-controller@...00000 {
>  			compatible = "arm,gic-v3";
>  			reg = <0x38800000 0x10000>,