lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 7 Oct 2021 15:13:46 -0700
From:   Eric Dumazet <edumazet@...gle.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     Eric Dumazet <eric.dumazet@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Borislav Petkov <bp@...e.de>
Subject: Re: [PATCH] x86/apic: reduce cache line misses in __x2apic_send_IPI_mask()

On Thu, Oct 7, 2021 at 7:13 AM Eric Dumazet <edumazet@...gle.com> wrote:
>
> On Thu, Oct 7, 2021 at 7:07 AM Peter Zijlstra <peterz@...radead.org> wrote:
> >
> > On Thu, Oct 07, 2021 at 07:04:09AM -0700, Eric Dumazet wrote:
> > > Good idea, I will try this.
> > > Hopefully nr_cpu_ids is populated there ?
> >
> > Lets hope :-), I'm always terminally lost in early bringup. I figure it
> > should be painfully obvious if it goes wrong.
>
> The answer seems to be yes on hosts I tested.

I have one more question about __x2apic_send_IPI_mask()

Would it make sense to disable hard irqs in __x2apic_send_IPI_mask()
only for CONFIG_CPUMASK_OFFSTACK=y builds ?

It seems wasteful to use tiny per-cpu variables and block hard irqs.

Quick and very dirty patch :

diff --git a/arch/x86/kernel/apic/x2apic_cluster.c
b/arch/x86/kernel/apic/x2apic_cluster.c
index e696e22d0531976f7cba72ed17443592eac72c13..c5076d40d4ea7bc9ffb06728531d91777a32cef4
100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -44,15 +44,18 @@ static void
 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
 {
        unsigned int cpu, clustercpu;
-       struct cpumask *tmpmsk;
+       cpumask_var_t tmpmsk;
+#ifdef CONFIG_CPUMASK_OFFSTACK
        unsigned long flags;
+#endif
        u32 dest;

        /* x2apic MSRs are special and need a special fence: */
        weak_wrmsr_fence();
+#ifdef CONFIG_CPUMASK_OFFSTACK
        local_irq_save(flags);
-
        tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
+#endif
        cpumask_copy(tmpmsk, mask);
        /* If IPI should not be sent to self, clear current CPU */
        if (apic_dest != APIC_DEST_ALLINC)
@@ -74,7 +77,9 @@ __x2apic_send_IPI_mask(const struct cpumask *mask,
int vector, int apic_dest)
                cpumask_andnot(tmpmsk, tmpmsk, &cmsk->mask);
        }

+#ifdef CONFIG_CPUMASK_OFFSTACK
        local_irq_restore(flags);
+#endif
 }

 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ