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Message-ID: <YV4/6TRdd3N1v8Zv@lunn.ch>
Date:   Thu, 7 Oct 2021 02:31:37 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Ansuel Smith <ansuelsmth@...il.com>
Cc:     Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [net-next PATCH 11/13] devicetree: net: dsa: qca8k: Document
 qca,sgmii-enable-pll

> +- qca,sgmii-enable-pll  : For SGMII CPU port, explicitly enable PLL, TX and RX
> +                          chain along with Signal Detection.

Continuing on with the comment in the previous post. You might want to
give a hit when this is needed.

     Andrew

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