lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <878rz5qbee.wl-maz@kernel.org>
Date:   Thu, 07 Oct 2021 13:15:05 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Rui Salvaterra <rsalvaterra@...il.com>
Cc:     tglx@...utronix.de, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [REGRESSION][BISECTED] 5.15-rc1: Broken AHCI on NVIDIA ION (MCP79)

On Thu, 07 Oct 2021 13:03:28 +0100,
Rui Salvaterra <rsalvaterra@...il.com> wrote:
> 
> Hi again, Marc,
> 
> On Thu, 7 Oct 2021 at 09:52, Marc Zyngier <maz@...nel.org> wrote:
> >
> [snipped]
> >
> > I guess this is the relevant device?
> 
> Pretty much, yes.
> 
> > It is interesting that it
> > advertises not supporting interrupt masking... Can you, you, out of
> > curiosity, give the following hack a go? I would expect things to
> > behave badly too (and maybe be even worse). But one way or another, it
> > may give us a hint.
> >
> > Thanks,
> >
> >         M.
> >
> > diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
> > index 0099a00af361..b3c0b9d07f17 100644
> > --- a/drivers/pci/msi.c
> > +++ b/drivers/pci/msi.c
> > @@ -205,7 +205,7 @@ static void __pci_msi_mask_desc(struct msi_desc *desc, u32 mask)
> >
> >         if (desc->msi_attrib.is_msix)
> >                 pci_msix_mask(desc);
> > -       else if (desc->msi_attrib.maskbit)
> > +       else //if (desc->msi_attrib.maskbit)
> >                 pci_msi_mask(desc, mask);
> >  }
> >
> > @@ -216,7 +216,7 @@ static void __pci_msi_unmask_desc(struct msi_desc *desc, u32 mask)
> >
> >         if (desc->msi_attrib.is_msix)
> >                 pci_msix_unmask(desc);
> > -       else if (desc->msi_attrib.maskbit)
> > +       else //if (desc->msi_attrib.maskbit)
> >                 pci_msi_unmask(desc, mask);
> >  }
> 
> Hm. You belive the controller is lying? :)

'Believe' is not a word I'd use. I know for a fact that all HW,
whether it is present, past or future is only a pile of hacks.

Given that your report tends to indicate that we fail to enable the
interrupt for this device, this would be a possibility.

> Sure thing, I'll give it a spin and let you know the result.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ