linux-kernel - [RFC PATCH v4 10/10] MAINTAINERS: Add entry for RISC-V ACLINT drivers

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20211007123632.697666-11-anup.patel@wdc.com>
Date:   Thu,  7 Oct 2021 18:06:32 +0530
From:   Anup Patel <anup.patel@....com>
To:     Palmer Dabbelt <palmer@...belt.com>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Rob Herring <robh+dt@...nel.org>
Cc:     Atish Patra <atish.patra@....com>,
        Alistair Francis <Alistair.Francis@....com>,
        Anup Patel <anup@...infault.org>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Anup Patel <anup.patel@....com>,
        Bin Meng <bmeng.cn@...il.com>
Subject: [RFC PATCH v4 10/10] MAINTAINERS: Add entry for RISC-V ACLINT drivers

Add myself as maintainer for RISC-V ACLINT drivers.

Signed-off-by: Anup Patel <anup.patel@....com>
Reviewed-by: Bin Meng <bmeng.cn@...il.com>
---
 MAINTAINERS | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 65afc028f4d3..4ccf3bce5c23 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16074,6 +16074,16 @@ S:	Maintained
 F:	drivers/mtd/nand/raw/r852.c
 F:	drivers/mtd/nand/raw/r852.h
 
+RISC-V ACLINT DRIVERS
+M:	Anup Patel <anup.patel@....com>
+L:	linux-riscv@...ts.infradead.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/interrupt-controller/riscv,aclint-swi.yaml
+F:	Documentation/devicetree/bindings/timer/riscv,aclint-mtimer.yaml
+F:	drivers/clocksource/timer-clint.c
+F:	drivers/irqchip/irq-riscv-aclint-swi.c
+F:	include/linux/irqchip/irq-riscv-aclint-swi.h
+
 RISC-V ARCHITECTURE
 M:	Paul Walmsley <paul.walmsley@...ive.com>
 M:	Palmer Dabbelt <palmer@...belt.com>
-- 
2.25.1