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Date: Fri, 8 Oct 2021 19:28:58 +0100 From: Suzuki K Poulose <suzuki.poulose@....com> To: linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org, will@...nel.org, catalin.marinas@....com, mathieu.poirier@...aro.org, mike.leach@...aro.org, leo.yan@...aro.org, anshuman.khandual@....com, coresight@...ts.linaro.org, maz@...nel.org, james.morse@....com, mark.rutland@....com, lcherian@...vell.com, Suzuki K Poulose <suzuki.poulose@....com> Subject: [PATCH v3 08/16] coresight: trbe: Allow driver to choose a different alignment The TRBE hardware mandates a minimum alignment for the TRBPTR_EL1, advertised via the TRBIDR_EL1. This is used by the driver to align the buffer write head. This patch allows the driver to choose a different alignment from that of the hardware, by decoupling the alignment tracking. This will be useful for working around errata. Cc: Mathieu Poirier <mathieu.poirier@...aro.org> Cc: Anshuman Khandual <anshuman.khandual@....com> Cc: Mike Leach <mike.leach@...aro.org> Cc: Leo Yan <leo.yan@...aro.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@....com> Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com> --- drivers/hwtracing/coresight/coresight-trbe.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index 58796ff425a4..f8c04c428780 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -67,8 +67,18 @@ struct trbe_buf { struct trbe_cpudata *cpudata; }; +/* + * struct trbe_cpudata: TRBE instance specific data + * @trbe_flag - TRBE dirty/access flag support + * @trbe_hw_align - Actual TRBE alignment required for TRBPTR_EL1. + * @trbe_align - Software alignment used for the TRBPTR_EL1, + * @cpu - CPU this TRBE belongs to. + * @mode - Mode of current operation. (perf/disabled) + * @drvdata - TRBE specific drvdata + */ struct trbe_cpudata { bool trbe_flag; + u64 trbe_hw_align; u64 trbe_align; int cpu; enum cs_mode mode; @@ -875,7 +885,7 @@ static ssize_t align_show(struct device *dev, struct device_attribute *attr, cha { struct trbe_cpudata *cpudata = dev_get_drvdata(dev); - return sprintf(buf, "%llx\n", cpudata->trbe_align); + return sprintf(buf, "%llx\n", cpudata->trbe_hw_align); } static DEVICE_ATTR_RO(align); @@ -963,11 +973,13 @@ static void arm_trbe_probe_cpu(void *info) goto cpu_clear; } - cpudata->trbe_align = 1ULL << get_trbe_address_align(trbidr); - if (cpudata->trbe_align > SZ_2K) { + cpudata->trbe_hw_align = 1ULL << get_trbe_address_align(trbidr); + if (cpudata->trbe_hw_align > SZ_2K) { pr_err("Unsupported alignment on cpu %d\n", cpu); goto cpu_clear; } + + cpudata->trbe_align = cpudata->trbe_hw_align; cpudata->trbe_flag = get_trbe_flag_update(trbidr); cpudata->cpu = cpu; cpudata->drvdata = drvdata; -- 2.25.4
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