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Message-ID: <878rz4nkw2.fsf@mpe.ellerman.id.au>
Date: Fri, 08 Oct 2021 16:30:37 +1100
From: Michael Ellerman <mpe@...erman.id.au>
To: Boqun Feng <boqun.feng@...il.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Cc: "Paul E . McKenney" <paulmck@...nel.org>,
Dan Lustig <dlustig@...dia.com>, Will Deacon <will@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Peter Anvin <hpa@...or.com>,
Andrea Parri <parri.andrea@...il.com>,
Ingo Molnar <mingo@...nel.org>,
Vince Weaver <vincent.weaver@...ne.edu>,
Thomas Gleixner <tglx@...utronix.de>,
Jiri Olsa <jolsa@...hat.com>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Stephane Eranian <eranian@...gle.com>, palmer@...belt.com,
paul.walmsley@...ive.com, Alan Stern <stern@...land.harvard.edu>,
linux-arch@...r.kernel.org
Subject: Re: [PATCH] tools/memory-model: Provide extra ordering for
unlock+lock pair on the same CPU
Boqun Feng <boqun.feng@...il.com> writes:
> (Add linux-arch in Cc list)
>
> Architecture maintainers, this patch is about strengthening our memory
> model a little bit, your inputs (confirmation, ack/nack, etc.) are
> appreciated.
Hi Boqun,
I don't feel like I'm really qualified to give an ack here, you and the
other memory model folk know this stuff much better than me.
But I have reviewed it and it matches my understanding of how our
barriers work, so it looks OK to me.
Reviewed-by: Michael Ellerman <mpe@...erman.id.au> (powerpc)
cheers
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