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Date:   Fri,  8 Oct 2021 14:07:49 +0800
From:   Huangzhaoyang <>
To:     Catalin Marinas <>,
        Will Deacon <>,
        Mark Rutland <>,
        Suzuki K Poulose <>,
        Ionela Voinescu <>,
        Quentin Perret <>,
        Vladimir Murzin <>,,
        Zhaoyang Huang <>,,
Subject: [RFC PATCH] arch: ARM64: add isb before enable pan

From: Zhaoyang Huang <>

set_pstate_pan failure is observed in an ARM64 system occasionaly on a reboot
test, which can be work around by a msleep on the sw context. We assume
suspicious on disorder of previous instr of disabling SW_PAN and add an isb here.

The bootup test failed with a invalid TTBR1_EL1 that equals 0x34000000, which is
alike racing between on chip PAN and SW_PAN.

Signed-off-by: Zhaoyang Huang <>
 arch/arm64/kernel/cpufeature.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index efed283..3c0de0d 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1663,6 +1663,7 @@ static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused)
 	sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0);
+	isb();
 #endif /* CONFIG_ARM64_PAN */

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