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Date: Fri, 8 Oct 2021 14:07:49 +0800 From: Huangzhaoyang <huangzhaoyang@...il.com> To: Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>, Suzuki K Poulose <suzuki.poulose@....com>, Ionela Voinescu <ionela.voinescu@....com>, Quentin Perret <qperret@...gle.com>, Vladimir Murzin <vladimir.murzin@....com>, linux-arm-kernel@...ts.infradead.org, Zhaoyang Huang <zhaoyang.huang@...soc.com>, linux-kernel@...r.kernel.org, ke.wang@...soc.com Subject: [RFC PATCH] arch: ARM64: add isb before enable pan From: Zhaoyang Huang <zhaoyang.huang@...soc.com> set_pstate_pan failure is observed in an ARM64 system occasionaly on a reboot test, which can be work around by a msleep on the sw context. We assume suspicious on disorder of previous instr of disabling SW_PAN and add an isb here. PS: The bootup test failed with a invalid TTBR1_EL1 that equals 0x34000000, which is alike racing between on chip PAN and SW_PAN. Signed-off-by: Zhaoyang Huang <zhaoyang.huang@...soc.com> --- arch/arm64/kernel/cpufeature.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index efed283..3c0de0d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1663,6 +1663,7 @@ static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused) WARN_ON_ONCE(in_interrupt()); sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0); + isb(); set_pstate_pan(1); } #endif /* CONFIG_ARM64_PAN */ -- 1.9.1
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