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Message-ID: <0befb3ab-cea8-ccd8-98f3-b05bfc6fb0f0@canonical.com>
Date: Fri, 8 Oct 2021 08:46:42 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Sam Protsenko <semen.protsenko@...aro.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Cc: Ryu Euiyoul <ryu.real@...sung.com>, Tom Gall <tom.gall@...aro.org>,
Sumit Semwal <sumit.semwal@...aro.org>,
John Stultz <john.stultz@...aro.org>,
Amit Pundir <amit.pundir@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v2 4/5] dt-bindings: clock: Document Exynos850 CMU
bindings
On 07/10/2021 21:41, Sam Protsenko wrote:
> Provide dt-schema documentation for Exynos850 SoC clock controller.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> Acked-by: Chanwoo Choi <cw00.choi@...sung.com>
> ---
> Changes in v2:
> - Dropped OSCCLK node declaration example
> - Dropped UART node declaration example
> - Added Ack tag by Chanwoo Choi
>
> .../clock/samsung,exynos850-clock.yaml | 185 ++++++++++++++++++
> 1 file changed, 185 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> new file mode 100644
> index 000000000000..79202e6e6402
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> @@ -0,0 +1,185 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos850 SoC clock controller
> +
> +maintainers:
> + - Sam Protsenko <semen.protsenko@...aro.org>
> + - Chanwoo Choi <cw00.choi@...sung.com>
> + - Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> + - Sylwester Nawrocki <s.nawrocki@...sung.com>
> + - Tomasz Figa <tomasz.figa@...il.com>
> +
> +description: |
> + Exynos850 clock controller is comprised of several CMU units, generating
> + clocks for different domains. Those CMU units are modeled as separate device
> + tree nodes, and might depend on each other. Root clocks in that clock tree are
> + two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
> + clocks must be defined as fixed-rate clocks in dts.
> +
> + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
> + dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
> +
> + Each clock is assigned an identifier and client nodes can use this identifier
> + to specify the clock which they consume. All clocks that available for usage
> + in clock consumer nodes are defined as preprocessor macros in
> + 'dt-bindings/clock/exynos850.h' header.
> +
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Best regards,
Krzysztof
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