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Message-ID: <1ec3cefb-12cd-86e8-fff2-1ab0d10034b6@gmail.com>
Date: Fri, 8 Oct 2021 13:27:05 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Yongqiang Niu <yongqiang.niu@...iatek.com>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Jassi Brar <jassisinghbrar@...il.com>,
Fabien Parent <fparent@...libre.com>,
Dennis YC Hsieh <dennis-yc.hsieh@...iatek.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
Project_Global_Chrome_Upstream_Group@...iatek.com,
Hsin-Yi Wang <hsinyi@...omium.org>, CK Hu <ck.hu@...iatek.com>
Subject: Re: [PATCH v10, 4/5] soc: mediatek: add mtk mutex support for MT8192
On 30/09/2021 17:52, Yongqiang Niu wrote:
> Add mtk mutex support for MT8192 SoC.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> Signed-off-by: Hsin-Yi Wang <hsinyi@...omium.org>
> Reviewed-by: CK Hu <ck.hu@...iatek.com>
Applied to v5.15-next/soc
Thanks!
> ---
> drivers/soc/mediatek/mtk-mutex.c | 35 ++++++++++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
> index 2e4bcc300576..2ca55bb5a8be 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -39,6 +39,18 @@
> #define MT8167_MUTEX_MOD_DISP_DITHER 15
> #define MT8167_MUTEX_MOD_DISP_UFOE 16
>
> +#define MT8192_MUTEX_MOD_DISP_OVL0 0
> +#define MT8192_MUTEX_MOD_DISP_OVL0_2L 1
> +#define MT8192_MUTEX_MOD_DISP_RDMA0 2
> +#define MT8192_MUTEX_MOD_DISP_COLOR0 4
> +#define MT8192_MUTEX_MOD_DISP_CCORR0 5
> +#define MT8192_MUTEX_MOD_DISP_AAL0 6
> +#define MT8192_MUTEX_MOD_DISP_GAMMA0 7
> +#define MT8192_MUTEX_MOD_DISP_POSTMASK0 8
> +#define MT8192_MUTEX_MOD_DISP_DITHER0 9
> +#define MT8192_MUTEX_MOD_DISP_OVL2_2L 16
> +#define MT8192_MUTEX_MOD_DISP_RDMA4 17
> +
> #define MT8183_MUTEX_MOD_DISP_RDMA0 0
> #define MT8183_MUTEX_MOD_DISP_RDMA1 1
> #define MT8183_MUTEX_MOD_DISP_OVL0 9
> @@ -214,6 +226,20 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
> };
>
> +static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> + [DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,
> + [DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,
> + [DDP_COMPONENT_COLOR0] = MT8192_MUTEX_MOD_DISP_COLOR0,
> + [DDP_COMPONENT_DITHER] = MT8192_MUTEX_MOD_DISP_DITHER0,
> + [DDP_COMPONENT_GAMMA] = MT8192_MUTEX_MOD_DISP_GAMMA0,
> + [DDP_COMPONENT_POSTMASK0] = MT8192_MUTEX_MOD_DISP_POSTMASK0,
> + [DDP_COMPONENT_OVL0] = MT8192_MUTEX_MOD_DISP_OVL0,
> + [DDP_COMPONENT_OVL_2L0] = MT8192_MUTEX_MOD_DISP_OVL0_2L,
> + [DDP_COMPONENT_OVL_2L2] = MT8192_MUTEX_MOD_DISP_OVL2_2L,
> + [DDP_COMPONENT_RDMA0] = MT8192_MUTEX_MOD_DISP_RDMA0,
> + [DDP_COMPONENT_RDMA4] = MT8192_MUTEX_MOD_DISP_RDMA4,
> +};
> +
> static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
> [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> [MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> @@ -275,6 +301,13 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = {
> .no_clk = true,
> };
>
> +static const struct mtk_mutex_data mt8192_mutex_driver_data = {
> + .mutex_mod = mt8192_mutex_mod,
> + .mutex_sof = mt8183_mutex_sof,
> + .mutex_mod_reg = MT8183_MUTEX0_MOD0,
> + .mutex_sof_reg = MT8183_MUTEX0_SOF0,
> +};
> +
> struct mtk_mutex *mtk_mutex_get(struct device *dev)
> {
> struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev);
> @@ -507,6 +540,8 @@ static const struct of_device_id mutex_driver_dt_match[] = {
> .data = &mt8173_mutex_driver_data},
> { .compatible = "mediatek,mt8183-disp-mutex",
> .data = &mt8183_mutex_driver_data},
> + { .compatible = "mediatek,mt8192-disp-mutex",
> + .data = &mt8192_mutex_driver_data},
> {},
> };
> MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);
>
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