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Message-ID: <163379788528.692348.11581080806976608802.stgit@dwillia2-desk3.amr.corp.intel.com>
Date: Sat, 09 Oct 2021 09:44:45 -0700
From: Dan Williams <dan.j.williams@...el.com>
To: linux-cxl@...r.kernel.org
Cc: Ben Widawsky <ben.widawsky@...el.com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, hch@....de
Subject: [PATCH v3 09/10] cxl/pci: Use pci core's DVSEC functionality
From: Ben Widawsky <ben.widawsky@...el.com>
Reduce maintenance burden of DVSEC query implementation by using the
centralized PCI core implementation.
Signed-off-by: Ben Widawsky <ben.widawsky@...el.com>
[djbw: kill cxl_pci_dvsec()]
Signed-off-by: Dan Williams <dan.j.williams@...el.com>
---
drivers/cxl/pci.c | 26 ++------------------------
1 file changed, 2 insertions(+), 24 deletions(-)
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index b6bc8e5ca028..f2e2a02d1fe6 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -340,29 +340,6 @@ static void cxl_unmap_regblock(struct pci_dev *pdev,
map->base = NULL;
}
-static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec)
-{
- int pos;
-
- pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DVSEC);
- if (!pos)
- return 0;
-
- while (pos) {
- u16 vendor, id;
-
- pci_read_config_word(pdev, pos + PCI_DVSEC_HEADER1, &vendor);
- pci_read_config_word(pdev, pos + PCI_DVSEC_HEADER2, &id);
- if (vendor == PCI_DVSEC_VENDOR_ID_CXL && dvsec == id)
- return pos;
-
- pos = pci_find_next_ext_capability(pdev, pos,
- PCI_EXT_CAP_ID_DVSEC);
- }
-
- return 0;
-}
-
static int cxl_probe_regs(struct pci_dev *pdev, struct cxl_register_map *map)
{
struct cxl_component_reg_map *comp_map;
@@ -449,7 +426,8 @@ static int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
u32 regloc_size, regblocks;
int regloc, i;
- regloc = cxl_pci_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID);
+ regloc = pci_find_dvsec_capability(pdev, PCI_DVSEC_VENDOR_ID_CXL,
+ PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID);
if (!regloc)
return -ENXIO;
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