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Message-ID: <CAPLW+4kJK=kaiCLDXX1EGLhbKJo5pcHQY9QCj0SVyGQP1n7q0g@mail.gmail.com>
Date: Mon, 11 Oct 2021 13:13:10 +0300
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Sylwester Nawrocki <snawrocki@...nel.org>
Cc: Ryu Euiyoul <ryu.real@...sung.com>, Tom Gall <tom.gall@...aro.org>,
Sumit Semwal <sumit.semwal@...aro.org>,
John Stultz <john.stultz@...aro.org>,
Amit Pundir <amit.pundir@...aro.org>,
devicetree <devicetree@...r.kernel.org>,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
linux-clk <linux-clk@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux Samsung SOC <linux-samsung-soc@...r.kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Subject: Re: [PATCH v3 4/5] dt-bindings: clock: Document Exynos850 CMU bindings
On Sat, 9 Oct 2021 at 23:41, Sylwester Nawrocki <snawrocki@...nel.org> wrote:
>
> On 08.10.2021 17:43, Sam Protsenko wrote:
> > Provide dt-schema documentation for Exynos850 SoC clock controller.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@...aro.org>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> > Acked-by: Chanwoo Choi <cw00.choi@...sung.com>
>
> > diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> > new file mode 100644
> > index 000000000000..79202e6e6402
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> > @@ -0,0 +1,185 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Samsung Exynos850 SoC clock controller
> > +
> > +maintainers:
> > + - Sam Protsenko <semen.protsenko@...aro.org>
> > + - Chanwoo Choi <cw00.choi@...sung.com>
> > + - Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> > + - Sylwester Nawrocki <s.nawrocki@...sung.com>
> > + - Tomasz Figa <tomasz.figa@...il.com>
> > +
> > +description: |
> > + Exynos850 clock controller is comprised of several CMU units, generating
> > + clocks for different domains. Those CMU units are modeled as separate device
> > + tree nodes, and might depend on each other. Root clocks in that clock tree are
> > + two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
> > + clocks must be defined as fixed-rate clocks in dts.
> > +
> > + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
> > + dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
> > +
> > + Each clock is assigned an identifier and client nodes can use this identifier
> > + to specify the clock which they consume. All clocks that available for usage
>
> s/All clocks that available/All clocks available ?
> No need to resend, I can amend it when applying.
>
Yeah, not a native speaker, I tend to do such mistakes sometimes :)
Please fix when applying.
Btw, I can see that you already applied 3 out of 5 patches from this
patch series here: [1]. Can you please also apply the rest, or is
there any outstanding comments that I missed?
[1] https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git/log/?h=for-v5.16/next
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