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Date:   Mon, 11 Oct 2021 11:54:23 +0100
From:   Will Deacon <will@...nel.org>
To:     Marc Zyngier <maz@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Mark Rutland <mark.rutland@....com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Peter Shier <pshier@...gle.com>,
        Raghavendra Rao Ananta <rananta@...gle.com>,
        Ricardo Koller <ricarkol@...gle.com>,
        Oliver Upton <oupton@...gle.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Linus Walleij <linus.walleij@...aro.org>,
        kernel-team@...roid.com
Subject: Re: [PATCH v3 16/17] arm64: Add handling of CNTVCTSS traps

On Sun, Oct 10, 2021 at 12:43:05PM +0100, Marc Zyngier wrote:
> Since CNTVCTSS obey the same control bits as CNTVCT, add the necessary
> decoding to the hook table. Note that there is no known user of
> this at the moment.
> 
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> ---
>  arch/arm64/include/asm/esr.h |  6 ++++++
>  arch/arm64/kernel/traps.c    | 11 +++++++++++
>  2 files changed, 17 insertions(+)

Acked-by: Will Deacon <will@...nel.org>

Will

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