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Message-ID: <1807525.kHsN9XgAzY@archbook>
Date: Tue, 12 Oct 2021 09:36:51 +0200
From: Nicolas Frattaroli <frattaroli.nicolas@...il.com>
To: Yifeng Zhao <yifeng.zhao@...k-chips.com>
Cc: heiko@...ech.de, robh+dt@...nel.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
vkoul@...nel.org, michael.riesch@...fvision.net,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, kishon@...com,
p.zabel@...gutronix.de
Subject: Re: [PATCH v1 2/3] phy/rockchip: add naneng combo phy for RK3568
On Donnerstag, 26. August 2021 14:38:43 CEST Yifeng Zhao wrote:
> This patch implements a combo phy driver for Rockchip SoCs
> with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
> sata-phy or sgmii-phy.
>
> Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com>
> ---
> [...]
> +static int rockchip_combphy_pcie_init(struct rockchip_combphy_priv *priv)
> +{
> + int ret = 0;
> +
> + if (priv->cfg->combphy_cfg) {
> + ret = priv->cfg->combphy_cfg(priv);
> + if (ret) {
> + dev_err(priv->dev, "failed to init phy for
pcie\n");
> + return ret;
> + }
> + }
> +
> + return ret;
> +}
> +
> +static int rockchip_combphy_usb3_init(struct rockchip_combphy_priv *priv)
> +{
> + int ret = 0;
> +
> + if (priv->cfg->combphy_cfg) {
> + ret = priv->cfg->combphy_cfg(priv);
> + if (ret) {
> + dev_err(priv->dev, "failed to init phy for
usb3\n");
> + return ret;
> + }
> + }
> +
> + return ret;
> +}
> +
> +static int rockchip_combphy_sata_init(struct rockchip_combphy_priv *priv)
> +{
> + int ret = 0;
> +
> + if (priv->cfg->combphy_cfg) {
> + ret = priv->cfg->combphy_cfg(priv);
> + if (ret) {
> + dev_err(priv->dev, "failed to init phy for
sata\n");
> + return ret;
> + }
> + }
> +
> + return ret;
> +}
> +
> +static int rockchip_combphy_sgmii_init(struct rockchip_combphy_priv *priv)
> +{
> + int ret = 0;
> +
> + if (priv->cfg->combphy_cfg) {
> + ret = priv->cfg->combphy_cfg(priv);
> + if (ret) {
> + dev_err(priv->dev, "failed to init phy for
sgmii\n");
> + return ret;
> + }
> + }
> +
> + return ret;
> +}
> +
> +static int rockchip_combphy_set_mode(struct rockchip_combphy_priv *priv)
> +{
> + switch (priv->mode) {
> + case PHY_TYPE_PCIE:
> + rockchip_combphy_pcie_init(priv);
> + break;
> + case PHY_TYPE_USB3:
> + rockchip_combphy_usb3_init(priv);
> + break;
> + case PHY_TYPE_SATA:
> + rockchip_combphy_sata_init(priv);
> + break;
> + case PHY_TYPE_SGMII:
> + case PHY_TYPE_QSGMII:
> + return rockchip_combphy_sgmii_init(priv);
> + default:
> + dev_err(priv->dev, "incompatible PHY type\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
All of the _init functions appear to be the same except for the error
string.
I think it would be better to just have the init done in _set_mode,
and then use the switch case statement to show the right error
message on if (ret).
> [...]
> +
> +static int rockchip_combphy_probe(struct platform_device *pdev)
> +{
> + struct phy_provider *phy_provider;
> + struct device *dev = &pdev->dev;
> + struct rockchip_combphy_priv *priv;
> + const struct rockchip_combphy_cfg *phy_cfg;
> + struct resource *res;
> + int ret;
> +
> + phy_cfg = of_device_get_match_data(dev);
> + if (!phy_cfg) {
> + dev_err(dev, "No OF match data provided\n");
> + return -EINVAL;
> + }
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + priv->mmio = devm_ioremap_resource(dev, res);
I think devm_platform_get_and_ioremap_resource is preferred here,
using it also means you can get rid of res.
> + if (IS_ERR(priv->mmio)) {
> + ret = PTR_ERR(priv->mmio);
> + return ret;
> + }
> +
> [...]
Regards,
Nicolas Frattaroli
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