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Message-Id: <1634028078-2387-5-git-send-email-hongxing.zhu@nxp.com>
Date:   Tue, 12 Oct 2021 16:41:13 +0800
From:   Richard Zhu <hongxing.zhu@....com>
To:     l.stach@...gutronix.de, tharvey@...eworks.com, kishon@...com,
        vkoul@...nel.org, robh@...nel.org, galak@...nel.crashing.org,
        shawnguo@...nel.org
Cc:     linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kernel@...gutronix.de, linux-imx@....com,
        Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v3 4/9] arm64: dts: imx8mm-evk: add the pcie phy support

Add the PCIe PHY support on iMX8MM EVK boards.
And set the default reference clock mode.

Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
 arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index e033d0257b5a..2d0684ac82f6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -5,6 +5,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/phy/phy-imx8-pcie.h>
 #include <dt-bindings/usb/pd.h>
 #include "imx8mm.dtsi"
 
@@ -289,6 +290,12 @@ pca6416: gpio@20 {
 	};
 };
 
+&pcie_phy {
+	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+	clocks = <&clk IMX8MM_CLK_DUMMY>;
+	status = "okay";
+};
+
 &sai3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_sai3>;
-- 
2.25.1

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