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Message-Id: <20211012134027.684712-1-kernel@esmil.dk>
Date: Tue, 12 Oct 2021 15:40:11 +0200
From: Emil Renner Berthing <kernel@...il.dk>
To: linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-serial@...r.kernel.org
Cc: Emil Renner Berthing <kernel@...il.dk>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Linus Walleij <linus.walleij@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Jiri Slaby <jirislaby@...nel.org>,
Maximilian Luz <luzmaximilian@...il.com>,
Sagar Kadam <sagar.kadam@...ive.com>,
Drew Fustini <drew@...gleboard.org>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Anup Patel <anup.patel@....com>,
Atish Patra <atish.patra@....com>,
Matteo Croce <mcroce@...rosoft.com>,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 00/16] Basic StarFive JH7100 RISC-V SoC support
This series adds support for the StarFive JH7100 RISC-V SoC. The SoC has
many devices that needs non-coherent dma operations to work which isn't
upstream yet[1], so this just adds basic support to boot up, get a
serial console, blink an LED and reboot itself. Unlike the Allwinner D1
this chip doesn't use any extra pagetable bits, but instead the DDR RAM
appears twice in the memory map, with and without the cache.
The JH7100 is a test chip for the upcoming JH7110 and about 300 BeagleV
Starlight Beta boards were sent out with them as part of a now cancelled
BeagleBoard.org project. However StarFive has produced more of the
JH7100s and more boards will be available[2] to buy. Hopefully before
the end of the year.
This series is also available at
https://github.com/esmil/linux/commits/starlight-minimal
..but a more complete kernel including non-coherent dma operations can
be found at
https://github.com/starfive-tech/linux/tree/starlight
/Emil
[1]: https://lore.kernel.org/linux-riscv/20210723214031.3251801-2-atish.patra@wdc.com/
[2]: https://www.linkedin.com/pulse/starfive-release-open-source-single-board-platform-q3-2021-starfive/
Emil Renner Berthing (12):
RISC-V: Add StarFive SoC Kconfig option
dt-bindings: timer: Add StarFive JH7100 clint
dt-bindings: interrupt-controller: Add StarFive JH7100 plic
dt-bindings: reset: Add Starfive JH7100 reset bindings
reset: starfive-jh7100: Add StarFive JH7100 reset driver
dt-bindings: pinctrl: Add StarFive pinctrl definitions
dt-bindings: pinctrl: Add StarFive JH7100 bindings
pinctrl: starfive: Add pinctrl driver for StarFive SoCs
dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
serial: 8250_dw: Add skip_clk_set_rate quirk
RISC-V: Add initial StarFive JH7100 device tree
RISC-V: Add BeagleV Starlight Beta device tree
Geert Uytterhoeven (4):
dt-bindings: clock: starfive: Add JH7100 clock definitions
dt-bindings: clock: starfive: Add JH7100 bindings
clk: starfive: Add JH7100 clock generator driver
dt-bindings: reset: Add StarFive JH7100 reset definitions
.../clock/starfive,jh7100-clkgen.yaml | 56 +
.../sifive,plic-1.0.0.yaml | 1 +
.../pinctrl/starfive,jh7100-pinctrl.yaml | 274 ++++
.../bindings/reset/starfive,jh7100-reset.yaml | 38 +
.../bindings/serial/snps-dw-apb-uart.yaml | 5 +
.../bindings/timer/sifive,clint.yaml | 1 +
MAINTAINERS | 22 +
arch/riscv/Kconfig.socs | 8 +
arch/riscv/boot/dts/Makefile | 1 +
arch/riscv/boot/dts/starfive/Makefile | 2 +
.../dts/starfive/jh7100-beaglev-starlight.dts | 162 ++
arch/riscv/boot/dts/starfive/jh7100.dtsi | 228 +++
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/starfive/Kconfig | 10 +
drivers/clk/starfive/Makefile | 3 +
drivers/clk/starfive/clk-starfive-jh7100.c | 769 +++++++++
drivers/pinctrl/Kconfig | 17 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-starfive.c | 1439 +++++++++++++++++
drivers/reset/Kconfig | 8 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-starfive-jh7100.c | 164 ++
drivers/tty/serial/8250/8250_dw.c | 32 +-
include/dt-bindings/clock/starfive-jh7100.h | 202 +++
.../dt-bindings/pinctrl/pinctrl-starfive.h | 274 ++++
include/dt-bindings/reset/starfive-jh7100.h | 126 ++
27 files changed, 3833 insertions(+), 13 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
create mode 100644 arch/riscv/boot/dts/starfive/Makefile
create mode 100644 arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
create mode 100644 arch/riscv/boot/dts/starfive/jh7100.dtsi
create mode 100644 drivers/clk/starfive/Kconfig
create mode 100644 drivers/clk/starfive/Makefile
create mode 100644 drivers/clk/starfive/clk-starfive-jh7100.c
create mode 100644 drivers/pinctrl/pinctrl-starfive.c
create mode 100644 drivers/reset/reset-starfive-jh7100.c
create mode 100644 include/dt-bindings/clock/starfive-jh7100.h
create mode 100644 include/dt-bindings/pinctrl/pinctrl-starfive.h
create mode 100644 include/dt-bindings/reset/starfive-jh7100.h
--
2.33.0
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