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Message-ID: <8500866.vLymJHTRYH@diego>
Date: Thu, 14 Oct 2021 01:07:29 +0200
From: Heiko Stübner <heiko@...ech.de>
To: Johan Jonker <jbx6244@...il.com>
Cc: robh+dt@...nel.org, linus.walleij@...aro.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/3] arm64: dts: rockchip: change gpio nodenames
Am Donnerstag, 7. Oktober 2021, 16:40:19 CEST schrieb Johan Jonker:
> Currently all gpio nodenames are sort of identical to there label.
> Nodenames should be of a generic type, so change them all.
>
> Signed-off-by: Johan Jonker <jbx6244@...il.com>
> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
Acked-by: Heiko Stuebner <heiko@...ech.de>
> ---
> arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++----
> arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++-----
> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++----
> arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++----
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++-----
> 5 files changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
> index 64f643145..17a64c3f0 100644
> --- a/arch/arm64/boot/dts/rockchip/px30.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
> @@ -1297,7 +1297,7 @@
> #size-cells = <2>;
> ranges;
>
> - gpio0: gpio0@...40000 {
> + gpio0: gpio@...40000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff040000 0x0 0x100>;
> interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1309,7 +1309,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio1: gpio1@...50000 {
> + gpio1: gpio@...50000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff250000 0x0 0x100>;
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1321,7 +1321,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio2: gpio2@...60000 {
> + gpio2: gpio@...60000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff260000 0x0 0x100>;
> interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1333,7 +1333,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio3: gpio3@...70000 {
> + gpio3: gpio@...70000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff270000 0x0 0x100>;
> interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> index ce6f4a28d..cec6d179b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> @@ -790,7 +790,7 @@
> #size-cells = <2>;
> ranges;
>
> - gpio0: gpio0@...20000 {
> + gpio0: gpio@...20000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff220000 0x0 0x100>;
> interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> @@ -801,7 +801,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio1: gpio1@...30000 {
> + gpio1: gpio@...30000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff230000 0x0 0x100>;
> interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> @@ -812,7 +812,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio2: gpio2@...40000 {
> + gpio2: gpio@...40000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff240000 0x0 0x100>;
> interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> @@ -823,7 +823,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio3: gpio3@...50000 {
> + gpio3: gpio@...50000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff250000 0x0 0x100>;
> interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> @@ -834,7 +834,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio4: gpio4@...60000 {
> + gpio4: gpio@...60000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff260000 0x0 0x100>;
> interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 5b2020590..6edb1a537 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -1014,7 +1014,7 @@
> #size-cells = <2>;
> ranges;
>
> - gpio0: gpio0@...10000 {
> + gpio0: gpio@...10000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff210000 0x0 0x100>;
> interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1027,7 +1027,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio1: gpio1@...20000 {
> + gpio1: gpio@...20000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff220000 0x0 0x100>;
> interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1040,7 +1040,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio2: gpio2@...30000 {
> + gpio2: gpio@...30000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff230000 0x0 0x100>;
> interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1053,7 +1053,7 @@
> #interrupt-cells = <2>;
> };
>
> - gpio3: gpio3@...40000 {
> + gpio3: gpio@...40000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff240000 0x0 0x100>;
> interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> index 4217897cd..ef6847014 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -797,7 +797,7 @@
> #size-cells = <0x2>;
> ranges;
>
> - gpio0: gpio0@...50000 {
> + gpio0: gpio@...50000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff750000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO0>;
> @@ -810,7 +810,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio1: gpio1@...80000 {
> + gpio1: gpio@...80000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff780000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO1>;
> @@ -823,7 +823,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio2: gpio2@...90000 {
> + gpio2: gpio@...90000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff790000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO2>;
> @@ -836,7 +836,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio3: gpio3@...a0000 {
> + gpio3: gpio@...a0000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff7a0000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO3>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 44def886b..577c02047 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1978,7 +1978,7 @@
> #size-cells = <2>;
> ranges;
>
> - gpio0: gpio0@...20000 {
> + gpio0: gpio@...20000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff720000 0x0 0x100>;
> clocks = <&pmucru PCLK_GPIO0_PMU>;
> @@ -1991,7 +1991,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio1: gpio1@...30000 {
> + gpio1: gpio@...30000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff730000 0x0 0x100>;
> clocks = <&pmucru PCLK_GPIO1_PMU>;
> @@ -2004,7 +2004,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio2: gpio2@...80000 {
> + gpio2: gpio@...80000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff780000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO2>;
> @@ -2017,7 +2017,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio3: gpio3@...88000 {
> + gpio3: gpio@...88000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff788000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO3>;
> @@ -2030,7 +2030,7 @@
> #interrupt-cells = <0x2>;
> };
>
> - gpio4: gpio4@...90000 {
> + gpio4: gpio@...90000 {
> compatible = "rockchip,gpio-bank";
> reg = <0x0 0xff790000 0x0 0x100>;
> clocks = <&cru PCLK_GPIO4>;
>
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