linux-kernel - Re: [PATCH V2 1/2] dt-bindings: update riscv plic compatible string

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAJF2gTSpVfgOQVjsZ37ZknmU-Kmht5JXc8D3-Oif2i-RWzfFCQ@mail.gmail.com>
Date:   Wed, 13 Oct 2021 08:41:04 +0800
From:   Guo Ren <guoren@...nel.org>
To:     Heiko Stübner <heiko@...ech.de>
Cc:     Anup Patel <anup@...infault.org>,
        Atish Patra <atish.patra@....com>,
        Marc Zyngier <maz@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Palmer Dabbelt <palmer@...belt.com>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Guo Ren <guoren@...ux.alibaba.com>,
        Rob Herring <robh@...nel.org>,
        Palmer Dabbelt <palmerdabbelt@...gle.com>
Subject: Re: [PATCH V2 1/2] dt-bindings: update riscv plic compatible string

On Tue, Oct 12, 2021 at 11:41 PM Heiko Stübner <heiko@...ech.de> wrote:
>
> Hi,
>
> Am Dienstag, 12. Oktober 2021, 17:34:31 CEST schrieb guoren@...nel.org:
> > From: Guo Ren <guoren@...ux.alibaba.com>
> >
> > Add the compatible string "thead,c9xx-plic" to the riscv plic
> > bindings to support SOCs with thead,c9xx processor cores.
> >
> > Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> > Cc: Rob Herring <robh@...nel.org>
> > Cc: Palmer Dabbelt <palmerdabbelt@...gle.com>
> > Cc: Anup Patel <anup@...infault.org>
> > Cc: Atish Patra <atish.patra@....com>
> > ---
> >  .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml         | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > index 08d5a57ce00f..202eb7666f9b 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> > @@ -46,6 +46,7 @@ properties:
> >        - enum:
> >            - sifive,fu540-c000-plic
> >            - canaan,k210-plic
> > +          - thead,c9xx-plic
>
> Devicetree bindings shouldn't use asterisks (the xx-part).
> Instead you want (probably)
>
> +          - thead,c906-plic
> +          - thead,c910-plic
Okay, remove xx-part. But I will use thread,c900-plic for all of them.

>
> to name the specific SoCs that plic is used on
>
>
> Heiko
>
> >        - const: sifive,plic-1.0.0
> >
> >    reg:
> >
>
>
>
>


-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/