linux-kernel - Re: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <00afb7b8bc6f7ad41cd6770532294992a667f1af.camel@ew.tq-group.com>
Date:   Wed, 13 Oct 2021 14:45:50 +0200
From:   Matthias Schiffer <matthias.schiffer@...tq-group.com>
To:     Richard Zhu <hongxing.zhu@....com>
Cc:     linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kernel@...gutronix.de, linux-imx@....com, l.stach@...gutronix.de,
        tharvey@...eworks.com, kishon@...com, vkoul@...nel.org,
        robh@...nel.org, galak@...nel.crashing.org, shawnguo@...nel.org
Subject: Re: [PATCH v3 9/9] PCI: imx: add the imx8mm pcie support

On Tue, 2021-10-12 at 16:41 +0800, Richard Zhu wrote:
> i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different PHY
> and allows to output the internal PHY reference clock via the refclk pad.
> Add the i.MX8MM PCIe support based on the standalone PHY driver.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> ---
> [...]
> @@ -1130,6 +1176,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
>  				 &imx6_pcie->tx_swing_low))
>  		imx6_pcie->tx_swing_low = 127;
>  
> +	/* get PHY refclk pad mode if there is PHY node */
> +	phy_node = of_parse_phandle(node, "phys", 0);
> +	if (phy_node) {
> +		of_property_read_u32(phy_node, "fsl,refclk-pad-mode",
> +				     &imx6_pcie->refclk_pad_mode);

It seems to me that the refclk_pad_mode is not actually used by this
driver anymore, because it is handled by the PHY driver now. Is there a
reason to read this property here at all?