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Date: Wed, 13 Oct 2021 16:50:38 +0200 From: Alvin Šipraga <alvin@...s.dk> To: Linus Walleij <linus.walleij@...aro.org>, Andrew Lunn <andrew@...n.ch>, Vivien Didelot <vivien.didelot@...il.com>, Florian Fainelli <f.fainelli@...il.com>, Vladimir Oltean <olteanv@...il.com>, "David S. Miller" <davem@...emloft.net>, Jakub Kicinski <kuba@...nel.org>, Rob Herring <robh+dt@...nel.org>, Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk> Cc: Alvin Šipraga <alsi@...g-olufsen.dk>, netdev@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Subject: [PATCH v2 net-next 6/6] net: phy: realtek: add support for RTL8365MB-VC internal PHYs From: Alvin Šipraga <alsi@...g-olufsen.dk> The RTL8365MB-VC ethernet switch controller has 4 internal PHYs for its user-facing ports. All that is needed is to let the PHY driver core pick up the IRQ made available by the switch driver. Signed-off-by: Alvin Šipraga <alsi@...g-olufsen.dk> Reviewed-by: Florian Fainelli <f.fainelli@...il.com> Reviewed-by: Linus Walleij <linus.walleij@...aro.org> --- v1 -> v2: no change RFC -> v1: no change; collect Reviewed-by drivers/net/phy/realtek.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 11be60333fa8..a5671ab896b3 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -1023,6 +1023,14 @@ static struct phy_driver realtek_drvs[] = { .resume = genphy_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + }, { + PHY_ID_MATCH_EXACT(0x001cc942), + .name = "RTL8365MB-VC Gigabit Ethernet", + /* Interrupt handling analogous to RTL8366RB */ + .config_intr = genphy_no_config_intr, + .handle_interrupt = genphy_handle_interrupt_no_ack, + .suspend = genphy_suspend, + .resume = genphy_resume, }, }; -- 2.32.0
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