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Date:   Fri, 15 Oct 2021 00:03:55 +0800
From:   Lai Jiangshan <laijs@...ux.alibaba.com>
To:     Lai Jiangshan <jiangshanlai@...il.com>,
        linux-kernel@...r.kernel.org
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>, kvm@...r.kernel.org
Subject: Re: [PATCH 0/2] KVM: X86: Don't reset mmu context when changing PGE
 or PCID

Ping

On 2021/9/19 10:42, Lai Jiangshan wrote:
> From: Lai Jiangshan <laijs@...ux.alibaba.com>
> 
> This patchset uses kvm_vcpu_flush_tlb_guest() instead of kvm_mmu_reset_context()
> when X86_CR4_PGE is changed or X86_CR4_PCIDE is changed 1->0.
> 
> Neither X86_CR4_PGE nor X86_CR4_PCIDE participates in kvm_mmu_role, so
> kvm_mmu_reset_context() is not required to be invoked.  Only flushing tlb
> is required as SDM says.
> 
> The patchset has nothing to do with performance, because the overheads of
> kvm_mmu_reset_context() and kvm_vcpu_flush_tlb_guest() are the same.  And
> even in the [near] future, kvm_vcpu_flush_tlb_guest() will be optimized,
> the code is not in the hot path.
> 
> This patchset makes the code more clear when to reset the mmu context.
> And it makes KVM_MMU_CR4_ROLE_BITS consistent with kvm_mmu_role.
> 
> Lai Jiangshan (2):
>    KVM: X86: Don't reset mmu context when X86_CR4_PCIDE 1->0
>    KVM: X86: Don't reset mmu context when toggling X86_CR4_PGE
> 
>   arch/x86/kvm/mmu.h | 5 ++---
>   arch/x86/kvm/x86.c | 7 +++++--
>   2 files changed, 7 insertions(+), 5 deletions(-)
> 

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