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Message-ID: <1d311e617667a2bbda233e423ca0b898@codeaurora.org>
Date:   Thu, 14 Oct 2021 23:39:12 +0530
From:   Prasad Malisetty <pmaliset@...eaurora.org>
To:     Stephen Boyd <swboyd@...omium.org>
Cc:     agross@...nel.org, bjorn.andersson@...aro.org,
        devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, manivannan.sadhasivam@...aro.org,
        robh+dt@...nel.org, sanm@...eaurora.org, vbadigan@...eaurora.org
Subject: Re: [PATCH v1] arm64: dts: qcom: sc7280: Add pcie clock support

On 2021-10-12 22:56, Stephen Boyd wrote:
> Quoting Prasad Malisetty (2021-10-12 05:36:11)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi 
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 39635da..78694c1 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -569,9 +569,10 @@
>>                         reg = <0 0x00100000 0 0x1f0000>;
>>                         clocks = <&rpmhcc RPMH_CXO_CLK>,
>>                                  <&rpmhcc RPMH_CXO_CLK_A>, 
>> <&sleep_clk>,
>> -                                <0>, <0>, <0>, <0>, <0>, <0>;
>> +                                <0>, <&pcie1_lane 0>,
>> +                                <0>, <0>, <0>, <0>;
>>                         clock-names = "bi_tcxo", "bi_tcxo_ao", 
>> "sleep_clk",
>> -                                     "pcie_0_pipe_clk", 
>> "pcie_1_pipe-clk",
>> +                                     "pcie_0_pipe_clk", 
>> "pcie_1_pipe_clk",
> 
> It looks like a fix because the name doesn't match the binding. Can you
> add a Fixes tag?
> 
Hi Stephen,

Thanks for the review.

Yes, I fixed the clock name as per the binding. I have added fixes tag 
and updated the new pacth.

Thanks
-Prasad

>>                                       "ufs_phy_rx_symbol_0_clk", 
>> "ufs_phy_rx_symbol_1_clk",
>>                                       "ufs_phy_tx_symbol_0_clk",
>>                                       
>> "usb3_phy_wrapper_gcc_usb30_pipe_clk";

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