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Message-Id: <20211014033414.16321-6-jiangshanlai@gmail.com>
Date: Thu, 14 Oct 2021 11:33:34 +0800
From: Lai Jiangshan <jiangshanlai@...il.com>
To: linux-kernel@...r.kernel.org
Cc: x86@...nel.org, Lai Jiangshan <laijs@...ux.alibaba.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
"H. Peter Anvin" <hpa@...or.com>,
Ben Widawsky <ben.widawsky@...el.com>,
Dave Jiang <dave.jiang@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Kees Cook <keescook@...omium.org>
Subject: [PATCH V3 11/49] x86: Mark __native_read_cr3() & native_write_cr3() as __always_inline
From: Lai Jiangshan <laijs@...ux.alibaba.com>
We need __native_read_cr3() & native_write_cr3() to be ensured noinstr.
It is prepared for later patches which implement entry code in C file.
Some of the code needs to handle KPTI and has to read/write CR3.
Signed-off-by: Lai Jiangshan <laijs@...ux.alibaba.com>
---
arch/x86/include/asm/special_insns.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 68c257a3de0d..fbb057ba60e6 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -42,14 +42,14 @@ static __always_inline void native_write_cr2(unsigned long val)
asm volatile("mov %0,%%cr2": : "r" (val) : "memory");
}
-static inline unsigned long __native_read_cr3(void)
+static __always_inline unsigned long __native_read_cr3(void)
{
unsigned long val;
asm volatile("mov %%cr3,%0\n\t" : "=r" (val) : __FORCE_ORDER);
return val;
}
-static inline void native_write_cr3(unsigned long val)
+static __always_inline void native_write_cr3(unsigned long val)
{
asm volatile("mov %0,%%cr3": : "r" (val) : "memory");
}
--
2.19.1.6.gb485710b
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