linux-kernel - Re: [PATCH v10 10/11] x86/tdx: Don't write CSTAR MSR on Intel

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Message-ID: <87czo77uia.ffs@tglx>
Date:   Thu, 14 Oct 2021 12:47:41 +0200
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        x86@...nel.org, Paolo Bonzini <pbonzini@...hat.com>,
        David Hildenbrand <david@...hat.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Juergen Gross <jgross@...e.com>, Deep Shah <sdeep@...are.com>,
        VMware Inc <pv-drivers@...are.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>
Cc:     Peter H Anvin <hpa@...or.com>, Dave Hansen <dave.hansen@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Kirill Shutemov <kirill.shutemov@...ux.intel.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Kuppuswamy Sathyanarayanan <knsathya@...nel.org>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v10 10/11] x86/tdx: Don't write CSTAR MSR on Intel

On Fri, Oct 08 2021 at 22:37, Kuppuswamy Sathyanarayanan wrote:
> From: Andi Kleen <ak@...ux.intel.com>
>
> On Intel CPUs writing the CSTAR MSR is not really needed. Syscalls
> from 32bit work using SYSENTER and 32bit SYSCALL is an illegal opcode.
> But the kernel did write it anyways even though it was ignored by
> the CPU. Inside a TDX guest this actually leads to a #VE which in
> turn will trigger ve_raise_fault() due to failed MSR write. Inside
> ve_raise_fault() before it recovers from this error, it prints an
> ugly message at boot. Since such warning message is pointless for
> CSTAR MSR write failure, add exception to skip CSTAR msr write on
> Intel CPUs.

Ugly messages are a technical reason? The above is word salad.

   Intel CPUs do not support SYSCALL in 32-bit mode, but the kernel
   initializes MSR_CSTAR unconditionally. That MSR write is normaly
   ignored by the CPU, but in a TDX guest it raises a #VE trap.

   Exlude Intel CPUs from the MSR_CSTAR initialization.

>  #ifdef CONFIG_IA32_EMULATION
> -	wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat);
> +	/*
> +	 * CSTAR is not needed on Intel because it doesn't support
> +	 * 32bit SYSCALL, but only SYSENTER. On a TDX guest
> +	 * it leads to a #GP.

Sigh. Above you write it raises #VE, but now it's #GP !?!

        Intel CPUs do not support 32-bit SYSCALL. Writing to MSR_CSTAR
        is normaly ignored by the CPU, but raises a #VE trap in a TDX
        guest.

Hmm?

Thanks,

        tglx