linux-kernel - Re: [PATCH v2 2/3] phy/rockchip: add naneng combo phy for RK3568

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 14 Oct 2021 13:37:39 +0200
From:   Philipp Zabel <p.zabel@...gutronix.de>
To:     Yifeng Zhao <yifeng.zhao@...k-chips.com>, heiko@...ech.de,
        robh+dt@...nel.org
Cc:     devicetree@...r.kernel.org, vkoul@...nel.org,
        michael.riesch@...fvision.net, linux-rockchip@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-phy@...ts.infradead.org, kishon@...com
Subject: Re: [PATCH v2 2/3] phy/rockchip: add naneng combo phy for RK3568

Hi Yifeng,

On Wed, 2021-10-13 at 18:19 +0800, Yifeng Zhao wrote:
> This patch implements a combo phy driver for Rockchip SoCs
> with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
> sata-phy or sgmii-phy.
> 
> Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com>
> ---
> 
> Changes in v2:
> - Using api devm_platform_get_and_ioremap_resource.
> - Modify rockchip_combphy_set_Mode.
> - Add some PHY registers definition.
> 
>  drivers/phy/rockchip/Kconfig                  |   8 +
>  drivers/phy/rockchip/Makefile                 |   1 +
>  .../rockchip/phy-rockchip-naneng-combphy.c    | 650 ++++++++++++++++++
>  3 files changed, 659 insertions(+)
>  create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> 
[...]
> diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> new file mode 100644
> index 000000000000..fbfc5fbbd5b8
> --- /dev/null
> +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> @@ -0,0 +1,650 @@
[...]
> +static int rockchip_combphy_parse_dt(struct device *dev,
> +				     struct rockchip_combphy_priv *priv)
> +{
> +	const struct rockchip_combphy_cfg *phy_cfg = priv->cfg;
> +	int ret, mac_id;
> +
[...]
> +	priv->apb_rst = devm_reset_control_get_optional(dev, "combphy-apb");

Please use devm_reset_control_get_optional_exclusive().

Also, apb_rst is never used?

> +	if (IS_ERR(priv->apb_rst)) {
> +		ret = PTR_ERR(priv->apb_rst);
> +
> +		if (ret != -EPROBE_DEFER)
> +			dev_warn(dev, "failed to get apb reset\n");
> +
> +		return ret;

Any reason not to use dev_err_probe()?

> +	}
> +
> +	priv->phy_rst = devm_reset_control_get_optional(dev, "combphy");

Please use devm_reset_control_get_optional_exclusive().

> +	if (IS_ERR(priv->phy_rst)) {
> +		ret = PTR_ERR(priv->phy_rst);
> +
> +		if (ret != -EPROBE_DEFER)
> +			dev_warn(dev, "failed to get phy reset\n");
> +
> +		return ret;

Same as above.

> +	}
> +
> +	return reset_control_assert(priv->phy_rst);

It is unexpected that a function called rockchip_combphy_parse_dt()
already changes device state.

I'd move the reset_control_assert() out into rockchip_combphy_probe().

regards
Philipp