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Message-ID: <020ab810-c975-d58b-a572-57eb3010d6c0@linaro.org>
Date: Thu, 14 Oct 2021 17:13:02 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Vinod Koul <vkoul@...nel.org>, Rob Clark <robdclark@...il.com>
Cc: linux-arm-msm@...r.kernel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Jonathan Marek <jonathan@...ek.ca>,
Abhinav Kumar <abhinavk@...eaurora.org>,
Jeffrey Hugo <jeffrey.l.hugo@...il.com>,
Sumit Semwal <sumit.semwal@...aro.org>,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org
Subject: Re: [PATCH v2 09/11] drm/msm/disp/dpu1: Add support for DSC in
topology
On 07/10/2021 10:08, Vinod Koul wrote:
> For DSC to work we typically need a 2,2,1 configuration. This should
> suffice for resolutions upto 4k. For more resolutions like 8k this won't
> work.
>
> Also, it is better to use 2 LMs and DSC instances as half width results
> in lesser power consumption as compared to single LM, DSC at full width.
>
> The panel has been tested only with 2,2,1 configuration, so for
> now we blindly create 2,2,1 topology when DSC is enabled
>
> Co-developed-by: Abhinav Kumar <abhinavk@...eaurora.org>
> Signed-off-by: Abhinav Kumar <abhinavk@...eaurora.org>
> Signed-off-by: Vinod Koul <vkoul@...nel.org>
> ---
> Changes since
> RFC:
> - Add more details in changelog
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index aac51c1bdf94..70f57a071165 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -538,6 +538,8 @@ static struct msm_display_topology dpu_encoder_get_topology(
> struct drm_display_mode *mode)
> {
> struct msm_display_topology topology = {0};
> + struct drm_encoder *drm_enc;
> + struct msm_drm_private *priv;
> int i, intf_count = 0;
>
> for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
> @@ -572,8 +574,22 @@ static struct msm_display_topology dpu_encoder_get_topology(
> topology.num_enc = 0;
> topology.num_intf = intf_count;
>
> + drm_enc = &dpu_enc->base;
> + priv = drm_enc->dev->dev_private;
> + if (priv && priv->dsc) {
> + /* In case of Display Stream Compression DSC, we would use
> + * 2 encoders, 2 line mixers and 1 interface
> + * this is power optimal and can drive upto (including) 4k
> + * screens
> + */
> + topology.num_enc = 2;
> + topology.num_intf = 1;
> + topology.num_lm = 2;
So, here you'd set the topology.num_rm.
> + }
> +
> return topology;
> }
> +
> static int dpu_encoder_virt_atomic_check(
> struct drm_encoder *drm_enc,
> struct drm_crtc_state *crtc_state,
>
--
With best wishes
Dmitry
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