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Message-ID: <CAL_JsqJHfpcvKekEFm-d7rMJ=UNc7dXwfaMMkUWZYsnPg=QNPQ@mail.gmail.com>
Date: Fri, 15 Oct 2021 10:53:15 -0500
From: Rob Herring <robh@...nel.org>
To: Mark Rutland <mark.rutland@....com>
Cc: Will Deacon <will@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Catalin Marinas <catalin.marinas@....com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Jiri Olsa <jolsa@...hat.com>,
Kan Liang <kan.liang@...ux.intel.com>,
Ian Rogers <irogers@...gle.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Honnappa Nagarahalli <honnappa.nagarahalli@....com>,
Zachary.Leaf@....com, Raphael Gault <raphael.gault@....com>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Namhyung Kim <namhyung@...nel.org>,
Itaru Kitayama <itaru.kitayama@...il.com>,
Vince Weaver <vincent.weaver@...ne.edu>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-perf-users@...r.kernel.org
Subject: Re: [PATCH v10 4/5] arm64: perf: Enable PMU counter userspace access
for perf event
On Thu, Oct 14, 2021 at 11:58 AM Mark Rutland <mark.rutland@....com> wrote:
>
> Hi Rob,
>
> This looks pretty good!
>
> I have one largish query below, and otherwise only trivialities that I'm
> happy to fix up.
>
> On Tue, Sep 14, 2021 at 03:47:59PM -0500, Rob Herring wrote:
[...]
> > static inline bool armv8pmu_event_is_chained(struct perf_event *event)
> > {
> > int idx = event->hw.idx;
> > struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
> >
> > - return !WARN_ON(idx < 0) &&
> > + return !(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT) &&
> > armv8pmu_event_is_64bit(event) &&
> > !armv8pmu_has_long_event(cpu_pmu) &&
> > (idx != ARMV8_IDX_CYCLE_COUNTER);
> > @@ -720,6 +726,27 @@ static inline u32 armv8pmu_getreset_flags(void)
> > return value;
>
> Above this, could we please add:
>
> | static inline bool armv8pmu_event_has_user_read(struct perf_event *event)
> | {
> | return event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT;
> | }
>
> ... and use that where we look at PERF_EVENT_FLAG_USER_READ_CNT?
Sure, but as this is a common flag now, I should probably make that a
common function in linux/perf_event.h and have x86 code use it too.
Rob
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