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Message-ID: <20211015172732.000012fc@Huawei.com>
Date: Fri, 15 Oct 2021 17:27:32 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Dan Williams <dan.j.williams@...el.com>
CC: <linux-cxl@...r.kernel.org>, <linux-pci@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <hch@....de>
Subject: Re: [PATCH v3 06/10] cxl/pci: Add @base to cxl_register_map
On Sat, 9 Oct 2021 09:44:29 -0700
Dan Williams <dan.j.williams@...el.com> wrote:
> In addition to carrying @barno, @block_offset, and @reg_type, add @base
> to keep all map/unmap parameters in one object. The helpers
> cxl_{map,unmap}_regblock() handle adjusting @base to the @block_offset
> at map and unmap time.
>
> Signed-off-by: Dan Williams <dan.j.williams@...el.com>
I don't really mind them, but why the renames
from cxl_pci_* to cxl_* ?
Jonathan
> ---
> drivers/cxl/cxl.h | 1 +
> drivers/cxl/pci.c | 31 ++++++++++++++++---------------
> 2 files changed, 17 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index a6687e7fd598..7cd16ef144dd 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -140,6 +140,7 @@ struct cxl_device_reg_map {
> };
>
> struct cxl_register_map {
> + void __iomem *base;
> u64 block_offset;
> u8 reg_type;
> u8 barno;
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 9f006299a0e3..b42407d067ac 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -306,8 +306,7 @@ static int cxl_pci_setup_mailbox(struct cxl_mem *cxlm)
> return 0;
> }
>
> -static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev,
> - struct cxl_register_map *map)
> +static int cxl_map_regblock(struct pci_dev *pdev, struct cxl_register_map *map)
> {
> void __iomem *addr;
> int bar = map->barno;
> @@ -318,24 +317,27 @@ static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev,
> if (pci_resource_len(pdev, bar) < offset) {
> dev_err(dev, "BAR%d: %pr: too small (offset: %#llx)\n", bar,
> &pdev->resource[bar], (unsigned long long)offset);
> - return NULL;
> + return -ENXIO;
> }
>
> addr = pci_iomap(pdev, bar, 0);
> if (!addr) {
> dev_err(dev, "failed to map registers\n");
> - return addr;
> + return -ENOMEM;
> }
>
> dev_dbg(dev, "Mapped CXL Memory Device resource bar %u @ %#llx\n",
> bar, offset);
>
> - return addr;
> + map->base = addr + map->block_offset;
> + return 0;
> }
>
> -static void cxl_pci_unmap_regblock(struct pci_dev *pdev, void __iomem *base)
> +static void cxl_unmap_regblock(struct pci_dev *pdev,
> + struct cxl_register_map *map)
> {
> - pci_iounmap(pdev, base);
> + pci_iounmap(pdev, map->base - map->block_offset);
> + map->base = NULL;
> }
>
> static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec)
> @@ -361,12 +363,12 @@ static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec)
> return 0;
> }
>
> -static int cxl_probe_regs(struct pci_dev *pdev, void __iomem *base,
> - struct cxl_register_map *map)
> +static int cxl_probe_regs(struct pci_dev *pdev, struct cxl_register_map *map)
> {
> struct cxl_component_reg_map *comp_map;
> struct cxl_device_reg_map *dev_map;
> struct device *dev = &pdev->dev;
> + void __iomem *base = map->base;
>
> switch (map->reg_type) {
> case CXL_REGLOC_RBI_COMPONENT:
> @@ -442,7 +444,6 @@ static void cxl_decode_regblock(u32 reg_lo, u32 reg_hi,
> */
> static int cxl_pci_setup_regs(struct cxl_mem *cxlm)
> {
> - void __iomem *base;
> u32 regloc_size, regblocks;
> int regloc, i, n_maps, ret = 0;
> struct device *dev = cxlm->dev;
> @@ -475,12 +476,12 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm)
> if (map->reg_type > CXL_REGLOC_RBI_MEMDEV)
> continue;
>
> - base = cxl_pci_map_regblock(pdev, map);
> - if (!base)
> - return -ENOMEM;
> + ret = cxl_map_regblock(pdev, map);
> + if (ret)
> + return ret;
>
> - ret = cxl_probe_regs(pdev, base + map->block_offset, map);
> - cxl_pci_unmap_regblock(pdev, base);
> + ret = cxl_probe_regs(pdev, map);
> + cxl_unmap_regblock(pdev, map);
> if (ret)
> return ret;
>
>
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