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Date:   Fri, 15 Oct 2021 07:49:16 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <Claudiu.Beznea@...rochip.com>, <Ludovic.Desroches@...rochip.com>,
        <vkoul@...nel.org>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <dmaengine@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/4] dmaengine: at_xdmac: call at_xdmac_axi_config() on
 resume path

On 10/7/21 2:12 PM, Claudiu Beznea wrote:
> at_xdmac could be used on SoCs which supports backup mode (where most
> of the SoC power, including power to DMA controller, is closed at suspend
> time). Thus, on resume, the settings which were previously done need to be
> restored. Do the same for axi configuration.
> 
> Fixes: f40566f220a1 ("dmaengine: at_xdmac: add AXI priority support and recommended settings")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@...rochip.com>

> ---
>  drivers/dma/at_xdmac.c | 51 ++++++++++++++++++++++--------------------
>  1 file changed, 27 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
> index ab78e0f6afd7..c66ad5706cb5 100644
> --- a/drivers/dma/at_xdmac.c
> +++ b/drivers/dma/at_xdmac.c
> @@ -1926,6 +1926,30 @@ static void at_xdmac_free_chan_resources(struct dma_chan *chan)
>  	return;
>  }
>  
> +static void at_xdmac_axi_config(struct platform_device *pdev)
> +{
> +	struct at_xdmac	*atxdmac = (struct at_xdmac *)platform_get_drvdata(pdev);
> +	bool dev_m2m = false;
> +	u32 dma_requests;
> +
> +	if (!atxdmac->layout->axi_config)
> +		return; /* Not supported */
> +
> +	if (!of_property_read_u32(pdev->dev.of_node, "dma-requests",
> +				  &dma_requests)) {
> +		dev_info(&pdev->dev, "controller in mem2mem mode.\n");
> +		dev_m2m = true;
> +	}
> +
> +	if (dev_m2m) {
> +		at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_M2M);
> +		at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_M2M);
> +	} else {
> +		at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_P2M);
> +		at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_P2M);
> +	}
> +}
> +
>  #ifdef CONFIG_PM
>  static int atmel_xdmac_prepare(struct device *dev)
>  {
> @@ -1975,6 +1999,7 @@ static int atmel_xdmac_resume(struct device *dev)
>  	struct at_xdmac		*atxdmac = dev_get_drvdata(dev);
>  	struct at_xdmac_chan	*atchan;
>  	struct dma_chan		*chan, *_chan;
> +	struct platform_device	*pdev = container_of(dev, struct platform_device, dev);
>  	int			i;
>  	int ret;
>  
> @@ -1982,6 +2007,8 @@ static int atmel_xdmac_resume(struct device *dev)
>  	if (ret)
>  		return ret;
>  
> +	at_xdmac_axi_config(pdev);
> +
>  	/* Clear pending interrupts. */
>  	for (i = 0; i < atxdmac->dma.chancnt; i++) {
>  		atchan = &atxdmac->chan[i];
> @@ -2007,30 +2034,6 @@ static int atmel_xdmac_resume(struct device *dev)
>  }
>  #endif /* CONFIG_PM_SLEEP */
>  
> -static void at_xdmac_axi_config(struct platform_device *pdev)
> -{
> -	struct at_xdmac	*atxdmac = (struct at_xdmac *)platform_get_drvdata(pdev);
> -	bool dev_m2m = false;
> -	u32 dma_requests;
> -
> -	if (!atxdmac->layout->axi_config)
> -		return; /* Not supported */
> -
> -	if (!of_property_read_u32(pdev->dev.of_node, "dma-requests",
> -				  &dma_requests)) {
> -		dev_info(&pdev->dev, "controller in mem2mem mode.\n");
> -		dev_m2m = true;
> -	}
> -
> -	if (dev_m2m) {
> -		at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_M2M);
> -		at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_M2M);
> -	} else {
> -		at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_P2M);
> -		at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_P2M);
> -	}
> -}
> -
>  static int at_xdmac_probe(struct platform_device *pdev)
>  {
>  	struct at_xdmac	*atxdmac;
> 

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