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Date:   Fri, 15 Oct 2021 12:27:58 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Stephane Eranian <eranian@...gle.com>
Cc:     linux-kernel@...r.kernel.org, kan.liang@...el.com,
        ak@...ux.intel.com
Subject: Re: [PATCH] perf/x86/intel: fix ICL/SPR INST_RETIRED.PREC_DIST
 encodings

On Thu, Oct 14, 2021 at 11:01:15AM -0700, Stephane Eranian wrote:
> On Thu, Oct 14, 2021 at 3:09 AM Peter Zijlstra <peterz@...radead.org> wrote:
> >
> > On Wed, Oct 13, 2021 at 05:12:14PM -0700, Stephane Eranian wrote:
> > > This patch fixes the encoding for INST_RETIRED.PREC_DIST as published by Intel
> > > (download.01.org/perfmon/) for Icelake. The official encoding
> > > is event code 0x00 umask 0x1, a change from Skylake where it was code 0xc0
> > > umask 0x1.
> > >
> > > With this patch applied it is possible to run:
> > > $ perf record -a -e cpu/event=0x00,umask=0x1/pp .....
> > >
> > > Whereas before this would fail.
> > >
> > > To avoid problems with tools which may use the old code, we maintain the old
> > > encoding for Icelake.
> >
> > Uuuuhhhhh.. but we 'stole' event=0x00 for the fake events. There must
> > not be actual hardware events there or we're in trouble. I thought Intel
> > knew that, I'm sure I told them that.
> 
> Yes, this is a pseudo event code. INST_RETIRED.PREC_DIST 0x0100 only
> works on fixed counter 0
> to deliver the better sample distribution.

Ah, okay. Thanks!

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