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Message-ID: <60331b5d-89e3-0dd7-c936-84808dcefc0c@kontron.de>
Date: Fri, 15 Oct 2021 12:44:35 +0200
From: Frieder Schrempf <frieder.schrempf@...tron.de>
To: Shawn Guo <shawnguo@...nel.org>, Frieder Schrempf <frieder@...s.de>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
NXP Linux Team <linux-imx@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH 1/8] arm64: dts: imx8mm-kontron: Add support for ultra
high speed modes on SD card
On 05.10.21 08:45, Shawn Guo wrote:
> On Thu, Sep 30, 2021 at 05:56:24PM +0200, Frieder Schrempf wrote:
>> From: Frieder Schrempf <frieder.schrempf@...tron.de>
>>
>> In order to use ultra high speed modes (UHS) on the SD card slot, we
>> add matching pinctrls and fix the voltage switching for LDO5 of the
>> PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
>>
>> Signed-off-by: Frieder Schrempf <frieder.schrempf@...tron.de>
>> ---
>> .../dts/freescale/imx8mm-kontron-n801x-s.dts | 28 ++++++++++++++++++-
>> .../freescale/imx8mm-kontron-n801x-som.dtsi | 2 ++
>> 2 files changed, 29 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> index d17abb515835..62ba3bd08a0c 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> @@ -189,8 +189,10 @@ usbnet: usbether@1 {
>> };
>>
>> &usdhc2 {
>> - pinctrl-names = "default";
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> pinctrl-0 = <&pinctrl_usdhc2>;
>> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
>> vmmc-supply = <®_vdd_3v3>;
>> vqmmc-supply = <®_nvcc_sd>;
>> cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
>> @@ -319,4 +321,28 @@ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
>> MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>> >;
>> };
>> +
>> + pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
>
> Did you run dtbs_check on it?
Thanks for the reminder. I ran the check now and will fix up the node
names in v2.
>
>> + fsl,pins = <
>> + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
>> + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
>> + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
>> + fsl,pins = <
>> + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
>> + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
>> + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>> + >;
>> + };
>> };
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> index d0456daefda8..03b3516abd64 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> @@ -86,6 +86,7 @@ pca9450: pmic@25 {
>> pinctrl-0 = <&pinctrl_pmic>;
>> interrupt-parent = <&gpio1>;
>> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
>> + sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
>>
>> regulators {
>> reg_vdd_soc: BUCK1 {
>> @@ -225,6 +226,7 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
>> pinctrl_pmic: pmicgrp {
>> fsl,pins = <
>> MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
>> + MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
>> >;
>> };
>>
>> --
>> 2.33.0
>>
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