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Date:   Fri, 15 Oct 2021 14:36:04 +0100
From:   Richard Fitzgerald <>
To:     <>
CC:     <>, <>,
        Richard Fitzgerald <>
Subject: [PATCH 01/16] ASoC: cs42l42: Don't reconfigure the PLL while it is running

When capture and playback substreams are both running at the same time,
cs42l42_pcm_hw_params() would be called for each direction. The first
call will configure the PLL. The second call must not write the PLL
configuration registers again if the first substream is already running,
as this could destabilize the PLL.

The DAI is marked symmetric sample bits and sample rate, so the two
directions will always have the same SCLK (I2S always has 2 channel slots
so the DAI does not need to require symmetric channels to guarantee the
same SCLK). However, since cs42l42_pll_config() is checking for an active
stream it may as well test that the requested SCLK is the same as the
currently active configuration.

Signed-off-by: Richard Fitzgerald <>
 sound/soc/codecs/cs42l42.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 8de23e4732b3..26f6a3510a03 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -618,6 +618,14 @@ static int cs42l42_pll_config(struct snd_soc_component *component)
 		clk = cs42l42->sclk;
+	/* Don't reconfigure if there is an audio stream running */
+	if (cs42l42->stream_use) {
+		if (pll_ratio_table[cs42l42->pll_config].sclk == clk)
+			return 0;
+		else
+			return -EBUSY;
+	}
 	for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) {
 		if (pll_ratio_table[i].sclk == clk) {
 			cs42l42->pll_config = i;

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