lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Sun, 17 Oct 2021 15:54:38 +0800 From: Xiang W <wxjstz@....com> To: Heinrich Schuchardt <heinrich.schuchardt@...onical.com>, Daniel Lezcano <daniel.lezcano@...aro.org>, Thomas Gleixner <tglx@...utronix.de> Cc: Guo Ren <guoren@...ux.alibaba.com>, Bin Meng <bmeng.cn@...il.com>, Samuel Holland <samuel@...lland.org>, Atish Patra <atish.patra@....com>, Rob Herring <robh+dt@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, Anup Patel <anup.patel@....com>, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org, opensbi@...ts.infradead.org Subject: Re: [PATCH 1/1] dt-bindings: reg-io-width for SiFive CLINT 在 2021-10-15星期五的 12:09 +0200,Heinrich Schuchardt写道: > The CLINT in the T-HEAD 9xx processors do not support 64bit mmio > access to > the MTIMER device. The current schema does not allow to specify this. > > OpenSBI currently uses a property 'clint,has-no-64bit-mmio' to > indicate the > restriction. Samuael Holland suggested in > lib: utils/timer: Use standard property to specify 32-bit I/O > https://github.com/smaeul/opensbi/commit/b95e9cf7cf93b0af16fc89204378bc59ff30008e > to use "reg-io-width = <4>;" as the reg-io-width property is > generally used > in the devicetree schema for such a condition. > > A release candidate of the ACLINT specification is available at > https://github.com/riscv/riscv-aclint/releases > > Add reg-io-width as optional property to the SiFive Core Local > Interruptor. > > Signed-off-by: Heinrich Schuchardt > <heinrich.schuchardt@...onical.com> > --- > Documentation/devicetree/bindings/timer/sifive,clint.yaml | 7 > +++++++ > 1 file changed, 7 insertions(+) > > diff --git > a/Documentation/devicetree/bindings/timer/sifive,clint.yaml > b/Documentation/devicetree/bindings/timer/sifive,clint.yaml > index a35952f48742..266012d887b5 100644 > --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml > +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml > @@ -41,6 +41,13 @@ properties: > reg: > maxItems: 1 > > + reg-io-width: > + description: | > + Some CLINT implementations, e.g. on the T-HEAD 9xx, only > support > + 32bit access for MTIMER. > + $ref: /schemas/types.yaml#/definitions/uint32 > + const: 4 > + > interrupts-extended: > minItems: 1 > I think we can move has_64bit_mmio to fdt_match->data.This way we no longer rely on 'clint, has-no-64bit-mmio' or 'reg-io-width' Regards, Xiang W
Powered by blists - more mailing lists