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Message-Id: <cover.1634539769.git.mchehab+huawei@kernel.org>
Date: Mon, 18 Oct 2021 08:07:25 +0100
From: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc: linuxarm@...wei.com, mauro.chehab@...wei.com,
Mauro Carvalho Chehab <mchehab+huawei@...nel.org>,
"Songxiaowei (Kirin_DRV)" <songxiaowei@...ilicon.com>,
Krzysztof WilczyĆski <kw@...ux.com>,
Alex Dewar <alex.dewar90@...il.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Binghui Wang <wangbinghui@...ilicon.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Jaehoon Chung <jh80.chung@...sung.com>,
Luca Ceresoli <luca@...aceresoli.net>,
Manivannan Sadhasivam <mani@...nel.org>,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh@...nel.org>, Simon Xue <xxm@...k-chips.com>,
Srikanth Thokala <srikanth.thokala@...el.com>,
Wesley Sheng <wesley.sheng@....com>,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: [PATCH v13 00/10] Add support for Hikey 970 PCIe
Hi Lorenzo,
That's basically the same patches sent on v12, with the acked-by from
the driver's maintainer (Xiaowei Song) properly added on each patch
of the series.
The pcie-kirin PCIe driver contains internally a PHY interface for
Kirin 960, but it misses support for Kirin 970.
Patch1 contains a PHY for Kirin 970 PCIe.
The remaining patches add support for Kirin 970 at the pcie-kirin driver, and
add the needed logic to compile it as module and to allow to dynamically
remove the driver in runtime.
Tested on HiKey970:
# lspci -D -PP
0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809
0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)
Tested on HiKey960:
# lspci -D
0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)
---
v13:
- Added Xiaowei's ack for the series.
v12:
- Change a comment at patch 1 to not use c99 style.
v11:
- patch 5 changed to use the right PCIe topology
- all other patches are identical to v10.
v10:
- patch 1: dropped magic numbers from PHY driver
- patch 5: allow pcie child nodes without reset-gpios
- all other patches are identical to v9.
v9:
- Did some cleanups at patches 1 and 5
Mauro Carvalho Chehab (10):
PCI: kirin: Reorganize the PHY logic inside the driver
PCI: kirin: Add support for a PHY layer
PCI: kirin: Use regmap for APB registers
PCI: kirin: Add support for bridge slot DT schema
PCI: kirin: Add Kirin 970 compatible
PCI: kirin: Add MODULE_* macros
PCI: kirin: Allow building it as a module
PCI: kirin: Add power_off support for Kirin 960 PHY
PCI: kirin: fix poweroff sequence
PCI: kirin: Allow removing the driver
drivers/pci/controller/dwc/Kconfig | 2 +-
drivers/pci/controller/dwc/pcie-kirin.c | 644 ++++++++++++++++++------
2 files changed, 498 insertions(+), 148 deletions(-)
--
2.31.1
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