From c656a01ad8d9252eb5747c3f3c1c861534acbcbd Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 18 Oct 2021 11:11:34 +0200 Subject: [PATCH] mfd: intel_soc_pmic: Use CPU-id check instead of _HRV check to differentiate variants The Intel Crystal Cove PMIC has 2 different variants, one for use with Bay Trail (BYT) SoCs and one for use with Cherry Trail (CHT) SoCs. So far we have been using an ACPI _HRV check to differentiate between the 2, but at least on the Microsoft Surface 3, which is a CHT device, the wrong _HRV value is reported by ACPI. So instead switch to a CPU-ID check which avoids us relying on the possibly wrong ACPI _HRV value. Reported-by: Tsuchiya Yuto Signed-off-by: Hans de Goede --- drivers/mfd/Kconfig | 2 +- drivers/mfd/intel_soc_pmic_core.c | 35 +++++++++---------------------- 2 files changed, 11 insertions(+), 26 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ca0edab91aeb..58866c425494 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -587,7 +587,7 @@ config LPC_SCH config INTEL_SOC_PMIC bool "Support for Crystal Cove PMIC" depends on ACPI && HAS_IOMEM && I2C=y && GPIOLIB && COMMON_CLK - depends on X86 || COMPILE_TEST + depends on X86 depends on I2C_DESIGNWARE_PLATFORM=y select MFD_CORE select REGMAP_I2C diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c index ddd64f9e3341..9e1588d4c82e 100644 --- a/drivers/mfd/intel_soc_pmic_core.c +++ b/drivers/mfd/intel_soc_pmic_core.c @@ -17,48 +17,33 @@ #include #include -#include "intel_soc_pmic_core.h" +#include +#include -/* Crystal Cove PMIC shares same ACPI ID between different platforms */ -#define BYT_CRC_HRV 2 -#define CHT_CRC_HRV 3 +#include "intel_soc_pmic_core.h" /* PWM consumed by the Intel GFX */ static struct pwm_lookup crc_pwm_lookup[] = { PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_pmic_backlight", 0, PWM_POLARITY_NORMAL), }; +static const struct x86_cpu_id byt_cpu_ids[] = { + X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL), + {} +}; + static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *i2c_id) { struct device *dev = &i2c->dev; struct intel_soc_pmic_config *config; struct intel_soc_pmic *pmic; - unsigned long long hrv; - acpi_status status; int ret; - /* - * There are 2 different Crystal Cove PMICs a Bay Trail and Cherry - * Trail version, use _HRV to differentiate between the 2. - */ - status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv); - if (ACPI_FAILURE(status)) { - dev_err(dev, "Failed to get PMIC hardware revision\n"); - return -ENODEV; - } - - switch (hrv) { - case BYT_CRC_HRV: + if (x86_match_cpu(byt_cpu_ids)) config = &intel_soc_pmic_config_byt_crc; - break; - case CHT_CRC_HRV: + else config = &intel_soc_pmic_config_cht_crc; - break; - default: - dev_warn(dev, "Unknown hardware rev %llu, assuming BYT\n", hrv); - config = &intel_soc_pmic_config_byt_crc; - } pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); if (!pmic) -- 2.31.1