linux-kernel - Re: [PATCH v2 1/3] ARM: dts: aspeed: mtjade: Add some gpios

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CACPK8Xcp0ruL-7p3AA+yvba3Drrwm-=-hMnMpd=a1aHwQHnE1A@mail.gmail.com>
Date:   Tue, 19 Oct 2021 06:46:14 +0000
From:   Joel Stanley <joel@....id.au>
To:     Quan Nguyen <quan@...amperecomputing.com>
Cc:     Rob Herring <robh+dt@...nel.org>, Andrew Jeffery <andrew@...id.au>,
        devicetree <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        linux-aspeed <linux-aspeed@...ts.ozlabs.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
        Open Source Submission <patches@...erecomputing.com>,
        Phong Vo <phong@...amperecomputing.com>,
        "Thang Q . Nguyen" <thang@...amperecomputing.com>
Subject: Re: [PATCH v2 1/3] ARM: dts: aspeed: mtjade: Add some gpios

On Tue, 19 Oct 2021 at 06:02, Quan Nguyen <quan@...amperecomputing.com> wrote:
>
> Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
> authentication fail on each socket.

These use the gpio-keys API to expose the GPIOs. I think OpenBMC is
moving away from this abstraction, and instead reading the GPIOs with
the gpio chardev interface.

>
> Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.
>
> Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.

OpenBMC has started a process to document GPIOs that are exposed to
userspace, initially so a common userspace can be used across
machines. I like doing it for the additional reason that it provides
consistency in the naming.

https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

If you could take a look at that document and add your GPIOs where
possible, and then update the device tree.

>
> Signed-off-by: Quan Nguyen <quan@...amperecomputing.com>
> Signed-off-by: Thang Nguyen <thang@...amperecomputing.com>
> ---
> v2:
>   - None
>
>  .../arm/boot/dts/aspeed-bmc-ampere-mtjade.dts | 21 ++++++++++++++++++-
>  1 file changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
> index 57b0c45a2298..3515d55bd312 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
> @@ -86,6 +86,18 @@ S0_cpu_fault {
>                         linux,code = <ASPEED_GPIO(J, 1)>;
>                 };
>
> +               S0_scp_auth_fail {
> +                       label = "S0_SCP_AUTH_FAIL";
> +                       gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
> +                       linux,code = <ASPEED_GPIO(J, 2)>;
> +               };
> +
> +               S1_scp_auth_fail {
> +                       label = "S1_SCP_AUTH_FAIL";
> +                       gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
> +                       linux,code = <ASPEED_GPIO(Z, 5)>;
> +               };
> +
>                 S1_overtemp {
>                         label = "S1_OVERTEMP";
>                         gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
> @@ -590,7 +602,7 @@ &gpio {
>         /*Q0-Q7*/       "","","","","","UID_BUTTON","","",
>         /*R0-R7*/       "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
>                         "OCP_MAIN_PWREN","RESET_BUTTON","","",
> -       /*S0-S7*/       "","","","","","","","",
> +       /*S0-S7*/       "","","","","RTC_BAT_SEN_EN","","","",

I suggest you create a proposal to call this one
battery-voltage-read-enable. I know that some of the IBM machines
intend to have this same GPIO.

>         /*T0-T7*/       "","","","","","","","",
>         /*U0-U7*/       "","","","","","","","",
>         /*V0-V7*/       "","","","","","","","",
> @@ -604,4 +616,11 @@ &gpio {
>                         "S1_BMC_DDR_ADR","","","","",
>         /*AC0-AC7*/     "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
>                         "BMC_OCP_PG";
> +
> +       i2c4_o_en {
> +               gpio-hog;
> +               gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "BMC_I2C4_O_EN";
> +       };
>  };
> --
> 2.28.0
>