linux-kernel - Re: [PATCH v6 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers bindings

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Date:   Tue, 19 Oct 2021 03:40:48 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Robert Marko <robert.marko@...tura.hr>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Lee Jones <lee.jones@...aro.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Luka Perkov <luka.perkov@...tura.hr>,
        "Jonathan M. Polom" <jmp@...phyte.org>,
        Paul Menzel <pmenzel@...gen.mpg.de>,
        Donald Buczek <buczek@...gen.mpg.de>
Subject: Re: [PATCH v6 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers
 bindings

> The SFP driver requires GPIO-s, it only knows how to use GPIO-s, and
> its a generic driver,
> it covers any device that has an SFP port that is implemented per spec.
> So, I cannot just extend it to suit my devices needs and I don't see
> how can I extend it in
> a generic manner so that it controls the pins directly via a regmap
> for example, especially since
> each switch has a different number of SFP ports and thus pins and a
> different register layout.
> 
> I have added Andrew Lunn as he is one of the maintainers of PHYLIB
> under which the SFP driver
> is, he may have some input on how to proceed with this.
> 
> I honestly think that we have some kind of misunderstanding here and
> look forward to resolving it.

Hi Robert

Can you describe your hardware and regmap in a bit more detail. What
do these registers look like? How do they map to the SFP cage pins?

	  Andrew