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Date: Tue, 19 Oct 2021 13:20:50 +0100 From: Will Deacon <will@...nel.org> To: linux-kernel@...r.kernel.org, Daniel Lezcano <daniel.lezcano@...aro.org>, Marc Zyngier <maz@...nel.org>, linux-arm-kernel@...ts.infradead.org Cc: catalin.marinas@....com, kernel-team@...roid.com, Will Deacon <will@...nel.org>, Linus Walleij <linus.walleij@...aro.org>, Thomas Gleixner <tglx@...utronix.de>, Peter Shier <pshier@...gle.com>, Ricardo Koller <ricarkol@...gle.com>, Oliver Upton <oupton@...gle.com>, Mark Rutland <mark.rutland@....com>, Raghavendra Rao Ananta <rananta@...gle.com> Subject: Re: [PATCH v4 00/17] clocksource/arm_arch_timer: Add basic ARMv8.6 support On Sun, 17 Oct 2021 13:42:08 +0100, Marc Zyngier wrote: > This is v4 (final?) of the series enabling ARMv8.6 support for timer > subsystem, and was prompted by a discussion with Oliver around the > fact that an ARMv8.6 implementation must have a 1GHz counter, which > leads to a number of things to break in the timer code: > > - the counter rollover can come pretty quickly as we only advertise a > 56bit counter, > - the maximum timer delta can be remarkably small, as we use the > countdown interface which is limited to 32bit... > > [...] Applied 14-17 to arm64 (for-next/8.6-timers), thanks! [14/17] arm64: Add a capability for FEAT_ECV https://git.kernel.org/arm64/c/fdf865988b5a [15/17] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 https://git.kernel.org/arm64/c/9ee840a96042 [16/17] arm64: Add handling of CNTVCTSS traps https://git.kernel.org/arm64/c/ae976f063b60 [17/17] arm64: Add HWCAP for self-synchronising virtual counter https://git.kernel.org/arm64/c/fee29f008aa3 Cheers, -- Will https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev
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