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Message-ID: <YXBiDr5mgtkgwBDR@google.com> Date: Wed, 20 Oct 2021 18:38:06 +0000 From: Sean Christopherson <seanjc@...gle.com> To: Tom Lendacky <thomas.lendacky@....com> Cc: Joerg Roedel <joro@...tes.org>, Paolo Bonzini <pbonzini@...hat.com>, Vitaly Kuznetsov <vkuznets@...hat.com>, Wanpeng Li <wanpengli@...cent.com>, Jim Mattson <jmattson@...gle.com>, x86@...nel.org, Brijesh Singh <brijesh.singh@....com>, kvm@...r.kernel.org, linux-kernel@...r.kernel.org, Joerg Roedel <jroedel@...e.de> Subject: Re: [PATCH v5 4/6] KVM: SVM: Add support to handle AP reset MSR protocol On Wed, Oct 20, 2021, Tom Lendacky wrote: > On 10/20/21 12:40 PM, Sean Christopherson wrote: > > On Wed, Oct 20, 2021, Joerg Roedel wrote: > > This can race with the SIPI and effectively corrupt svm->vmcb->control.ghcb_gpa. > > > > vCPU0 vCPU1 > > #VMGEXIT(RESET_HOLD) > > __kvm_vcpu_halt() > > INIT > > SIPI > > sev_vcpu_deliver_sipi_vector() > > ghcb_msr_ap_rst_resp(1); > > This isn't possible. vCPU0 doesn't set vCPU1's GHCB value. vCPU1's GHCB > value is set when vCPU1 handles events in vcpu_enter_guest(). Argh, I was thinking of injecting regular IPIs across vCPUs. In hindsight it makes sense that INIT and SIPI are handled on the current vCPU, stuffing all that state from a different vCPU would be needlessly complex.
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