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Message-ID: <163476433456.25758.298027771225902304.tip-bot2@tip-bot2>
Date:   Wed, 20 Oct 2021 21:12:14 -0000
From:   "irqchip-bot for Florian Fainelli" <tip-bot2@...utronix.de>
To:     linux-kernel@...r.kernel.org
Cc:     Florian Fainelli <f.fainelli@...il.com>,
        Marc Zyngier <maz@...nel.org>, tglx@...utronix.de
Subject: [irqchip: irq/irqchip-next] irqchip/irq-bcm7038-l1: Restrict affinity
 setting to MIPS

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     3578fd47137c405b6fb9f90e2e6d1654c71f5e1e
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/3578fd47137c405b6fb9f90e2e6d1654c71f5e1e
Author:        Florian Fainelli <f.fainelli@...il.com>
AuthorDate:    Wed, 20 Oct 2021 11:48:51 -07:00
Committer:     Marc Zyngier <maz@...nel.org>
CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00

irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS

Only MIPS based platforms using this interrupt controller as first level
interrupt controller can actually change the affinity of interrupts by
re-programming the affinity mask of the interrupt controller and use
another word group to have another CPU process the interrupt.

When this interrupt is used as a second level interrupt controller on
ARM/ARM64 there is no way to change the interrupt affinity. This fixes a
NULL pointer de-reference while trying to change the affinity since
there is only a single word group in that case, and we would have been
overruning the intc->cpus[] array.

Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
Signed-off-by: Marc Zyngier <maz@...nel.org>
Link: https://lore.kernel.org/r/20211020184859.2705451-6-f.fainelli@gmail.com
---
 drivers/irqchip/irq-bcm7038-l1.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c
index 3c4e348..357570d 100644
--- a/drivers/irqchip/irq-bcm7038-l1.c
+++ b/drivers/irqchip/irq-bcm7038-l1.c
@@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d)
 	raw_spin_unlock_irqrestore(&intc->lock, flags);
 }
 
+#if defined(CONFIG_MIPS) && defined(CONFIG_SMP)
 static int bcm7038_l1_set_affinity(struct irq_data *d,
 				   const struct cpumask *dest,
 				   bool force)
@@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,
 
 	return 0;
 }
+#endif
 
 static int __init bcm7038_l1_init_one(struct device_node *dn,
 				      unsigned int idx,
@@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = {
 	.name			= "bcm7038-l1",
 	.irq_mask		= bcm7038_l1_mask,
 	.irq_unmask		= bcm7038_l1_unmask,
+#if defined(CONFIG_SMP) && defined(CONFIG_MIPS)
 	.irq_set_affinity	= bcm7038_l1_set_affinity,
+#endif
 #ifdef CONFIG_PM_SLEEP
 	.irq_set_wake		= bcm7038_l1_set_wake,
 #endif

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