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Message-Id: <20211020142809.349347-17-miquel.raynal@bootlin.com>
Date: Wed, 20 Oct 2021 16:28:07 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Tudor Ambarus <Tudor.Ambarus@...rochip.com>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>
Cc: <linux-mtd@...ts.infradead.org>, <linux-spi@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Julien Su <juliensu@...c.com.tw>,
Jaime Liao <jaimeliao@...c.com.tw>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Boris Brezillon <boris.brezillon@...labora.com>,
Xiangsheng Hou <Xiangsheng.Hou@...iatek.com>,
Miquel Raynal <miquel.raynal@...tlin.com>
Subject: [PATCH 16/18] spi: mxic: Create a helper to ease the start of an operation
Create the mxic_spi_mem_prep_op_cfg() helper to provide the content to
write to the register controlling the next IO command. This helper will
soon be used by the dirmap implementation and having this code
factorized out earlier will clarify this addition.
Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
---
drivers/spi/spi-mxic.c | 53 +++++++++++++++++++++++-------------------
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 068543c40ce7..3c4e64cbe812 100644
--- a/drivers/spi/spi-mxic.c
+++ b/drivers/spi/spi-mxic.c
@@ -296,6 +296,33 @@ static u32 mxic_spi_prep_hc_cfg(struct spi_device *spi, u32 flags)
HC_CFG_SLV_ACT(spi->chip_select) | HC_CFG_IDLE_SIO_LVL(1);
}
+static u32 mxic_spi_mem_prep_op_cfg(const struct spi_mem_op *op)
+{
+ u32 cfg = OP_CMD_BYTES(op->cmd.nbytes) |
+ OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) |
+ (op->cmd.dtr ? OP_CMD_DDR : 0);
+
+ if (op->addr.nbytes)
+ cfg |= OP_ADDR_BYTES(op->addr.nbytes) |
+ OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) |
+ (op->addr.dtr ? OP_ADDR_DDR : 0);
+
+ if (op->dummy.nbytes)
+ cfg |= OP_DUMMY_CYC(op->dummy.nbytes);
+
+ if (op->data.nbytes) {
+ cfg |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) |
+ (op->data.dtr ? OP_DATA_DDR : 0);
+ if (op->data.dir == SPI_MEM_DATA_IN) {
+ cfg |= OP_READ;
+ if (op->data.dtr)
+ cfg |= OP_DQS_EN;
+ }
+ }
+
+ return cfg;
+}
+
static int mxic_spi_data_xfer(struct mxic_spi *mxic, const void *txbuf,
void *rxbuf, unsigned int len)
{
@@ -374,7 +401,6 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
{
struct mxic_spi *mxic = spi_master_get_devdata(mem->spi->master);
int i, ret;
- u32 ss_ctrl;
u8 addr[8], cmd[2];
ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
@@ -386,29 +412,8 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
writel(HC_EN_BIT, mxic->regs + HC_EN);
- ss_ctrl = OP_CMD_BYTES(op->cmd.nbytes) |
- OP_CMD_BUSW(fls(op->cmd.buswidth) - 1) |
- (op->cmd.dtr ? OP_CMD_DDR : 0);
-
- if (op->addr.nbytes)
- ss_ctrl |= OP_ADDR_BYTES(op->addr.nbytes) |
- OP_ADDR_BUSW(fls(op->addr.buswidth) - 1) |
- (op->addr.dtr ? OP_ADDR_DDR : 0);
-
- if (op->dummy.nbytes)
- ss_ctrl |= OP_DUMMY_CYC(op->dummy.nbytes);
-
- if (op->data.nbytes) {
- ss_ctrl |= OP_DATA_BUSW(fls(op->data.buswidth) - 1) |
- (op->data.dtr ? OP_DATA_DDR : 0);
- if (op->data.dir == SPI_MEM_DATA_IN) {
- ss_ctrl |= OP_READ;
- if (op->data.dtr)
- ss_ctrl |= OP_DQS_EN;
- }
- }
-
- writel(ss_ctrl, mxic->regs + SS_CTRL(mem->spi->chip_select));
+ writel(mxic_spi_mem_prep_op_cfg(op),
+ mxic->regs + SS_CTRL(mem->spi->chip_select));
writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
mxic->regs + HC_CFG);
--
2.27.0
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