linux-kernel - Re: [PATCH v3 11/25] PCI: aardvark: Remove redundant error fabrication when device read fails

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Date:   Thu, 21 Oct 2021 17:58:12 +0200
From:   Pali Rohár <pali@...nel.org>
To:     Naveen Naidu <naveennaidu479@...il.com>
Cc:     bhelgaas@...gle.com,
        linux-kernel-mentees@...ts.linuxfoundation.org,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        skhan@...uxfoundation.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        "moderated list:PCI DRIVER FOR AARDVARK (Marvell Armada 3700)" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 11/25] PCI: aardvark: Remove redundant error
 fabrication when device read fails

On Thursday 21 October 2021 20:37:36 Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error. There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> The host controller drivers sets the error response values (~0) and
> returns an error when faulty hardware read occurs. But the error
> response value (~0) is already being set in PCI_OP_READ and
> PCI_USER_READ_CONFIG whenever a read by host controller driver fails.
> 
> Thus, it's no longer necessary for the host controller drivers to
> fabricate any error response.
> 
> This helps unify PCI error response checking and make error check
> consistent and easier to find.
> 
> Signed-off-by: Naveen Naidu <naveennaidu479@...il.com>

Reviewed-by: Pali Rohár <pali@...nel.org>

> ---
>  drivers/pci/controller/pci-aardvark.c | 10 ++--------
>  1 file changed, 2 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 596ebcfcc82d..1af772c76d06 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -893,10 +893,8 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
>  	u32 reg;
>  	int ret;
>  
> -	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
> -		*val = 0xffffffff;
> +	if (!advk_pcie_valid_device(pcie, bus, devfn))
>  		return PCIBIOS_DEVICE_NOT_FOUND;
> -	}
>  
>  	if (pci_is_root_bus(bus))
>  		return pci_bridge_emul_conf_read(&pcie->bridge, where,
> @@ -920,7 +918,6 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
>  			*val = CFG_RD_CRS_VAL;
>  			return PCIBIOS_SUCCESSFUL;
>  		}
> -		*val = 0xffffffff;
>  		return PCIBIOS_SET_FAILED;
>  	}
>  
> @@ -955,16 +952,13 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
>  			*val = CFG_RD_CRS_VAL;
>  			return PCIBIOS_SUCCESSFUL;
>  		}
> -		*val = 0xffffffff;
>  		return PCIBIOS_SET_FAILED;
>  	}
>  
>  	/* Check PIO status and get the read result */
>  	ret = advk_pcie_check_pio_status(pcie, allow_crs, val);
> -	if (ret < 0) {
> -		*val = 0xffffffff;
> +	if (ret < 0)
>  		return PCIBIOS_SET_FAILED;
> -	}
>  
>  	if (size == 1)
>  		*val = (*val >> (8 * (where & 3))) & 0xff;
> -- 
> 2.25.1
>